7 часов назад
Staff/ Principal Physical Design CAD Engineer (AI)
Мэтч & Сопровод
Для мэтча с этой вакансией нужен Plus
Описание вакансии
Текст:
TL;DR
Staff/ Principal Physical Design CAD Engineer (AI): Developing and improving CAD flows and parasitic extraction methodologies for complex semiconductor chips powering large-scale AI infrastructure with an accent on physical design implementation, automation, and signoff accuracy. Focus on building Synopsys Fusion Compiler flows, analyzing timing, power, congestion, and QoR, and integrating GenAI solutions for debug and engineering productivity.
Location: Tel Aviv-Yafo, Tel Aviv District, Israel
Company
develops rack-scale AI infrastructure and semiconductor connectivity solutions based on CXL, Ethernet, NVLink, PCIe, and UALink technologies, supported by its COSMOS software suite.
What you will do
- Develop, maintain, and improve physical design CAD flows and methodologies using industry-standard EDA tools.
- Build automation infrastructure for implementation, analysis, reporting, debugging, and large-scale design flows.
- Support synthesis, floorplanning, placement, clock-tree synthesis, routing, timing closure, power optimization, physical verification, and signoff readiness.
- Create scripts and utilities that improve productivity, quality of results, and flow robustness.
- Support and enhance flows based on Synopsys Fusion Compiler.
- Analyze tool logs, QoR metrics, timing reports, congestion, utilization, power, and design-rule issues while integrating GenAI solutions for repetitive tasks and debugging.
Requirements
- At least 3 years of hands-on experience in physical design, CAD, or implementation methodology.
- Strong knowledge of digital physical design, including synthesis, placement, clock-tree synthesis, routing, timing closure, and physical verification.
- Hands-on experience with Synopsys Fusion Compiler and automation around EDA tools.
- Proficiency in scripting languages such as Tcl and Python.
- Understanding of timing, power, congestion, floorplanning, and QoR analysis.
- Strong debugging, problem-solving, collaboration, and motivation to apply GenAI technologies in semiconductor design flows.
Nice to have
- Experience with PrimeTime, StarRC, ICC2, Innovus, Voltus, RedHawk, Calibre, or similar tools.
- Knowledge of STA, low-power design, UPF, EM/IR, extraction, or signoff flows.
- Experience building dashboards, regression systems, flow checkers, or automated report analyzers.
- Familiarity with LLMs, prompt engineering, AI agents, GenAI coding or debugging tools, Git, CI/CD, databases, or cloud-based compute environments.
Culture & Benefits
- Opportunity to join a new strategic R&D center in Israel as a foundational technical contributor.
- Work on semiconductor chips addressing data bottlenecks in large-scale AI infrastructure.
- Inclusive environment welcoming diverse backgrounds and experiences.
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