Staff/ Principal Design Verification Engineer (AI)

Location: Tel Aviv-Yafo, Tel Aviv District, Israel

Company

hirify.global develops semiconductor-based connectivity solutions and software for rack-scale AI infrastructure, integrating technologies such as CXL, Ethernet, NVLink, PCIe, and UALink.

What you will do

• Design and develop ASIC verification environments for unit-level and subsystem functional blocks.
• Build and maintain SystemVerilog and UVM components, including traffic generators, monitors, and checkers.
• Execute verification plans and develop functional coverage models for complex digital designs.
• Analyze coverage results, identify verification gaps, and drive designs toward verification closure.
• Debug complex hardware issues, determine root causes, and collaborate with design engineers on resolution.
• Improve verification methodologies and contribute to a collaborative R&D environment.

Requirements

• Bachelor’s degree in Electrical Engineering or a related technical field.
• 5+ years of ASIC verification experience in the semiconductor industry.
• Hands-on experience developing components for complex verification environments using SystemVerilog.
• Strong knowledge of UVM and standard verification methodologies.
• Analytical problem-solving skills and experience with technical debugging.
• Strong communication and collaboration skills in an R&D environment.

Nice to have

• Master’s degree in Electrical Engineering or a related field.
• Familiarity with formal verification or emulation flows.
• Python or Tcl scripting for verification automation.
• Experience with AMBA, PCIe, Ethernet, or CXL protocols.
• Experience with assertion-based verification, constrained-random testing, or connectivity and networking silicon.

Culture & Benefits

• Opportunity to contribute to a new strategic R&D center in Israel.
• Work on next-generation semiconductor technology for AI infrastructure.
• Collaborative, team-oriented environment focused on creativity, innovation, and diverse perspectives.