Senior SoC Architect (Semiconductors)

Location: Remote, based in Aachen, Germany

Company

hirify.global develops graphene photonic solutions that connect chips into high-throughput, low-delay, and energy-efficient computing networks.

What you will do

• Own the overall Electronics-Photonics IC SoC architecture from initial concept through production.
• Translate the Marketing Requirement Document into a complete, internally consistent, and implementable Product Requirement Document.
• Define the digital subsystem architecture, including core logic, on-chip interconnect fabric, and subsystem partitioning.
• Own the high-speed I/O architecture, including SerDes and protocol digital logic for UCIe, PCIe, and Ethernet.
• Integrate analog/RF, photonics, packaging, memory, and digital subsystem architectures within electrical, physical, and packaging constraints.
• Drive performance, power, and area trade-off analysis, coordinate with external IP vendors, and present the architecture for product and engineering sign-off.

Requirements

• 7–10 years of experience in SoC or product architecture roles, including ownership of a complete product architecture cycle.
• Deep hands-on expertise in high-speed SerDes and protocol digital logic for UCIe, PCIe, and Ethernet.
• Strong experience with digital subsystem architecture, on-chip interconnects, and complex SoC partitioning.
• Experience translating product requirements into engineering-ready architecture specifications and evaluating full-chip performance, power, and area trade-offs.
• Experience with third-party IP vendors, architecture and requirements-management tooling, protocol compliance tooling, and full-chip performance or power modeling.
• Experience with Python or C++ for modeling, scripting, and analysis, plus cross-domain integration across analog, photonics, packaging, and memory architectures.

Nice to have

• Previous experience as an SoC Chief Engineer with end-to-end full-chip architecture accountability.
• Familiarity with silicon photonics, electro-optic I/O, advanced 2.5D/3D packaging, and chiplet integration.
• Experience with CXL or other die-to-die and coherent interconnect standards.
• Experience working with product management or customers to shape MRD-level requirements.

Culture & Benefits

• Flexible, human-centric work practices designed to support work-life harmony.
• Autonomy, continuous learning, and professional and personal development opportunities.
• Benefits including insurance, pension, and virtual stock options.
• Open, inclusive, and collaborative working environment focused on innovation and growth.