7 часов назад
Senior/ Staff Package Design Engineer
Мэтч & Сопровод
Для мэтча с этой вакансией нужен Plus
Описание вакансии
Текст:
TL;DR
Senior/ Staff Package Design Engineer (IC packaging): Developing advanced IC packaging solutions for high-performance connectivity silicon, from feasibility and detailed design through qualification and high-volume manufacturing, with an accent on signal integrity, power integrity, thermal performance, and manufacturability. Focus on implementing organic substrates, interposers, chiplet packaging, and CoWoS integration while solving complex electrical, mechanical, reliability, yield, and cost tradeoffs.
Location: Israel
Company
Provides rack-scale AI infrastructure through semiconductor-based connectivity solutions integrating CXL, Ethernet, NVLink, PCIe, UALink, and supporting software.
What you will do
- Own end-to-end IC package design from early feasibility and detailed design through qualification and high-volume manufacturing.
- Implement package architectures using organic substrates, advanced laminates, interposers, multi-die and chiplet packaging, and CoWoS 2.5D/3D integration.
- Drive package-level signal integrity, power integrity, thermal, electrical, mechanical, and cost tradeoffs for high-speed, high-power devices.
- Perform package layout, substrate routing, bump and ball maps, stack-ups, materials selection, and mechanical constraint definition.
- Collaborate with silicon, SerDes, system, SI/PI, reliability, manufacturing, OSAT, and substrate vendor teams.
- Support DFM, yield and cost targets, risk assessments, failure analysis, corrective actions, NPI, qualification, and production ramp.
Requirements
- 5+ years of hands-on IC package design experience for high-performance semiconductor products, with ownership from concept through tape-out.
- Expertise with Cadence APD, SiP, or equivalent IC package design tools.
- Experience designing complex BGA, FCBGA, or FCCSP packages.
- Strong package integration expertise covering stack-ups, ball and bump maps, constraints, SMT integration, and package BOM ownership.
- Deep understanding of package-level signal, power, and thermal integrity, including design tradeoffs based on analysis.
- Manufacturing and release experience with DRC, LVS, DFM, OSAT engagement, and production-ready package designs.
Nice to have
- Experience with AI, networking, PCIe, CXL, or other high-speed data center interfaces.
- Familiarity with JEDEC and IPC reliability standards and qualification methods such as thermal cycling and HTOL.
- Experience with chiplet-based architectures and heterogeneous integration.
- Track record of complete technical package ownership on high-volume products.
Culture & Benefits
- Opportunity to contribute to a new strategic R&D center in Israel.
- Work on connectivity silicon supporting large-scale AI and cloud environments.
- Collaborative environment involving silicon, signal integrity, power integrity, mechanical, manufacturing, reliability, and external partners.
- Inclusive workplace encouraging applications from people with diverse backgrounds and experiences.
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