8 часов назад
Package Layout Engineer (Advanced Packaging)
157 000 - 176 000$
Мэтч & Сопровод
Для мэтча с этой вакансией нужен Plus
Описание вакансии
Текст:
TL;DR
Package Layout Engineer (Advanced Packaging): Developing IC package substrate layouts for next-generation photonics and AI data center products with an accent on signal integrity, power integrity, thermal performance, and manufacturability. Focus on floorplanning, advanced 2.5D/3D packaging, substrate supplier coordination, and solving complex analog, digital, and photonics integration challenges.
Location: Mountain View, California, United States; flexible hybrid workplace model
Salary: $157,000–$176,000 USD annually, plus equity and other rewards
Company
develops photonics-based infrastructure for AI and high-performance computing data centers, including 3D-stacked photonics engines.
What you will do
- Deliver IC package substrate layouts for standard and advanced packaging technologies.
- Create preliminary substrate designs and floorplans to optimize silicon, package, and motherboard stack-ups.
- Apply substrate layout rules, stack-ups, and implementation guidelines with suppliers and OSAT partners.
- Generate fabrication files and coordinate Design for Manufacturing and Design for Assembly closure.
- Design packages that meet signal integrity, power integrity, thermal, mechanical, analog, and digital requirements.
- Support iterative routing, package tape-outs, design automation, and verification across functional teams.
Requirements
- B.S. or M.S. degree in Electrical Engineering or a similar discipline.
- At least 5 years of relevant experience, including 3–5 years in IC package layout design.
- Proficiency with Allegro X APD.
- Understanding of IC package substrates, organic materials, and their impact on package design.
- Ability to collaborate with signal integrity, power integrity, packaging, substrate supplier, and OSAT teams.
Nice to have
- Experience with Cadence Integrity 3DIC, Expedition Package Designer, Pads Layout, or Altium.
- Experience with SKILL or Python scripting for layout design automation.
- Exposure to 2.5D/3D IC, silicon interposer, EMIB, or fan-out chip-on-wafer architectures.
- Experience evaluating floorplans, escape routing, bump patterns, and die-to-die interface topologies.
- Background in IC packaging and substrate layout design.
Culture & Benefits
- Flexible hybrid workplace model.
- Medical, dental, and vision coverage.
- Retirement savings matching, life insurance, and disability coverage.
- Vacation, sick leave, public holidays, and paid family leave.
- Training and development, commuter benefits, and equity grants for full-time employees.
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