Silicon Photonics Process Engineer (Wafer Thinning and Dicing)

Location: Singapore

Company

hirify.global develops silicon photonic chips and advanced packaging processes.

What you will do

• Develop wafer backside grinding, thinning, laser stealth dicing, and die sorting processes for silicon photonic chips.
• Optimize wafer thickness, grinding speed, cutting paths, and laser parameters to prevent cracks, edge chipping, and optical structure damage.
• Investigate wafer thinning and dicing abnormalities, including warpage, surface scratches, incomplete cutting, and chip breakage.
• Monitor wafer thickness uniformity, cutting quality, production capacity, and process yield.
• Evaluate compatibility between grinding, stealth dicing, bumping, and flip-chip processes.
• Prepare SOPs, work instructions, failure reports, and engineering change documentation while supporting NPI and process verification.

Requirements

• Bachelor’s or master’s degree in Materials Science, Chemical Engineering, Mechanical Engineering, Microelectronics, or an equivalent technical discipline.
• 3 to 6+ years of hands-on process engineering experience in wafer mounting, wafer dicing, wafer thinning, or grinding.
• Experience handling advanced packaging wafers with complex topologies or stacked structures.
• Experience working with external equipment and material suppliers to develop, characterize, qualify, and scale processes for mass production.
• Familiarity with SPC, JMP data analysis, and DOE matrix design.

Culture & Benefits

• Work with OSAT partners or internal production lines.
• Support new assembly requirements and new product introduction.
• Contribute to continuous process optimization and production yield improvement.