Sr Layout Engineer (Analog IC)

Location: Schaffhausen, Switzerland

Company

hirify.global develops integrated power semiconductors and power delivery architectures for the semiconductor industry.

What you will do

• Design and simulate block-level analog circuits.
• Capture schematics and perform layout verification, post-layout extraction, and simulation.
• Integrate and verify top-level analog and mixed-signal designs.
• Apply layout techniques covering substrate coupling, LatchUp, and ESD rules.
• Collaborate across analog, digital, systems, packaging/ESD, test, and applications disciplines.
• Travel occasionally as needed.

Requirements

• Master’s degree in Electrical Engineering or higher.
• Solid experience designing ADCs, including SAR, Delta-Sigma, Counting, or Pipelined architectures.
• Strong transistor-level analog and digital circuit theory knowledge and analog IC implementation skills.
• Experience with layout design, extraction, and tools such as Cadence or Mentor.
• Strong written and verbal communication skills.
• Fluent English and willingness to work effectively in a multidisciplinary group.

Nice to have

• Low-noise amplifier, op-amp, or RF design experience.
• Knowledge of digital design flows, digital systems, and analog/digital interface integration.
• Experience with mixed-mode system-level AMS simulation on SoCs.

Culture & Benefits

• Work in a fast-growing semiconductor company focused on technical leadership and innovation.
• Contribute to products supporting power delivery architectures.
• Collaborate with colleagues across multiple technical disciplines.
• Work in an environment that values creativity and sustainability.