2 часа назад
Senior or Staff Level Analog IC Designer (Semiconductor)
150 000 - 200 000$
Вакансия из Hirify Global, списка международных tech-компанийДля мэтча и отклика нужен Plus
Мэтч & Сопровод
Для мэтча с этой вакансией нужен Plus
Описание вакансии
Текст:
TL;DR
Senior or Staff Level Analog IC Designer (Semiconductor): Designing and developing analog and mixed-signal integrated circuits, including bandgap references, oscillators, LDOs, op-amps, ADCs, and DACs, from specification through silicon validation with an accent on circuit performance, power, area, reliability, and post-layout accuracy. Focus on translating system specifications into robust architectures, guiding layout, running PEX and corner simulations, and debugging silicon in the laboratory.
Location: Hybrid, with 3 days per week onsite at offices in Vancouver, Washington or Chandler, Arizona.
Annual base salary: $150,000–$200,000 for Member of Technical Staff.
Company
is a well-funded semiconductor startup developing chiplet solutions for powering high-performance chips used in AI and advanced computing.
What you will do
- Design core analog and mixed-signal circuit blocks, including bandgaps, oscillators, LDOs, op-amps, ADCs, and DACs.
- Translate system and block specifications into circuit architectures and implementations.
- Capture schematics, run simulations, and optimize designs for performance, power, area, and reliability.
- Guide layout and collaborate with layout and verification engineers to preserve design intent.
- Perform post-layout PEX simulations and correlate results with pre-layout analysis.
- Support silicon bring-up, characterization, evaluation, debugging, design reviews, and technical documentation.
Requirements
- 5+ years of hands-on analog design experience.
- Bachelor’s degree in Electrical Engineering, Computer Science, or a related field.
- Strong foundation in analog circuit theory, device physics, and CMOS technologies.
- Experience carrying designs from specification through schematic, simulation, layout guidance, and post-layout verification.
- Proficiency with industry-standard EDA tools such as Cadence and with DC, AC, transient, noise, and corner simulations.
- Laboratory experience with silicon bring-up, bench characterization, and debugging of analog or mixed-signal ICs.
Nice to have
- Experience with deep submicron CMOS process technologies.
- Familiarity with high-power or high-accuracy analog design techniques.
- Strong communication skills and experience working in collaborative engineering environments.
Culture & Benefits
- Stock option grant.
- Comprehensive health, dental, and vision benefits.
- 401(k) plan.
- Cross-functional collaboration across layout, verification, and silicon validation.
Будьте осторожны: если работодатель просит войти в их систему, используя iCloud/Google, прислать код/пароль, запустить код/ПО, не делайте этого - это мошенники. Обязательно жмите "Пожаловаться" или пишите в поддержку. Подробнее в гайде →