Назад
Company hidden
6 часов назад

Principal Silicon Validation Engineer (SerDes/PAM4)

185 000 - 240 000$
Формат работы
onsite
Тип работы
fulltime
Грейд
senior
Английский
b2
Страна
US
Вакансия из списка Hirify.GlobalВакансия из Hirify Global, списка международных tech-компаний
Для мэтча и отклика нужен Plus

Мэтч & Сопровод

Для мэтча с этой вакансией нужен Plus

Описание вакансии

Текст:
/
TL;DR
Principal Silicon Validation Engineer (SerDes/PAM4): Developing and executing electrical validation tests for high-speed connectivity ICs and board products with an accent on post-silicon validation, PCIe/PAM4 interfaces, and automated bench testing. Focus on debugging complex SoC designs, quantifying electrical margins, analyzing signal integrity, and certifying parametric compliance across system conditions.

Location: San Jose, California, United States

Salary: $185,000–$240,000 USD base salary per year

Company

hirify.global develops semiconductor-based connectivity solutions and software for rack-scale AI infrastructure, including CXL, Ethernet, NVLink, PCIe, and UALink technologies.

What you will do

  • Develop comprehensive post-silicon validation plans for complex connectivity ICs and board products.
  • Design and execute electrical validation tests to quantify device performance, margins, and parametric compliance.
  • Automate IC and board testing with Python-based bench automation and data analysis.
  • Lead SoC debugging and investigate unexpected behavior through structured experiments and root-cause analysis.
  • Validate high-speed PCIe and PAM4 Ethernet links across short, medium, and long channels.
  • Report validation results, specification compliance, and product robustness to internal stakeholders.

Requirements

  • Bachelor’s degree in Electrical Engineering, Computer Engineering, or a related field; a Master’s degree is preferred.
  • 8+ years of experience supporting or developing complex SoC or silicon products for server, storage, or networking applications.
  • Experience with high-speed interfaces such as PCIe 5, PCIe 6, or PAM4 802.3 Ethernet.
  • Knowledge of PCIe Base Specification and CEM Specification electrical compliance requirements.
  • Working knowledge of PLLs, DFE, Tx EQ, CDR, PAM4, PRBS testing, and high-speed data-link optimization.
  • Strong Python scripting, object-oriented programming, Git, bench automation, and experience with BERTs, oscilloscopes, and VNAs.

Nice to have

  • Experience with PCIe/CXL compliance standards and electrical compliance testing at industry workshops.
  • Hands-on signal-integrity experience, including channel-loss budgeting and de-embedding.
  • Knowledge of NRZ and PAM4 signaling and PCIe standards.
  • Experience with MATLAB, Keysight ADS, or PLTS for electrical-channel and signal-integrity analysis.

Culture & Benefits

  • Customer requirements and product parametric conformance are treated as the highest priorities.
  • The role requires independent problem solving, prioritization across multiple tasks, and minimal supervision.
  • A professional, open-minded, entrepreneurial, and customer-focused working style is expected.
  • Applications are encouraged from candidates with diverse backgrounds and experiences.

Будьте осторожны: если работодатель просит войти в их систему, используя iCloud/Google, прислать код/пароль, запустить код/ПО, не делайте этого - это мошенники. Обязательно жмите "Пожаловаться" или пишите в поддержку. Подробнее в гайде →