6 часов назад
Signal Integrity Engineer
157 000 - 176 000$
Вакансия из Hirify Global, списка международных tech-компанийДля мэтча и отклика нужен Plus
Мэтч & Сопровод
Для мэтча с этой вакансией нужен Plus
Описание вакансии
Текст:
TL;DR
Signal Integrity Engineer (High-Speed Interfaces): Driving next-generation data center products from concept through development with an accent on package and system architecture, high-speed channel analysis, and lab characterization. Focus on analyzing PCIe, UCIe, and SerDes links, solving complex signal integrity interactions across digital, analog, and photonics domains, and validating performance with advanced simulation and measurement tools.
Location: Mountain View, California, United States; flexible hybrid workplace model.
Salary: $157,000–$176,000 USD per year base salary, plus equity and other rewards.
Company
develops photonics-based infrastructure for AI and high-performance computing data centers, including its 3D-stacked Passage photonics engine.
What you will do
- Drive signal integrity engineering for next-generation products from concept through development and lab bring-up.
- Plan and execute signal integrity tasks for high-speed PCIe, UCIe, and SerDes interfaces.
- Analyze S-parameters, insertion loss, return loss, crosstalk, eye diagrams, jitter, and equalization to optimize signal quality.
- Influence package and system architecture, PCB design, impedance matching, termination, routing, and via design.
- Measure and characterize signals using oscilloscopes, network analyzers, TDRs, and VNAs to validate performance and troubleshoot issues.
- Collaborate with hardware designers and PCB layout engineers, participate in design reviews, and communicate analysis results and design guidelines.
Requirements
- B.S. or M.S. degree in Electrical Engineering or a related field and at least 5 years of relevant experience.
- Professional expertise in signal integrity analysis for high-speed interfaces.
- Experience with Ansys Siwave, HFSS, and Keysight ADS.
- Strong understanding of transmission line theory, impedance matching, equalization, and high-speed signaling protocols.
- Experience with lower-speed critical interfaces and control buses, including system clocks, SPI, and I2C.
- Experience with PCB design considerations and laboratory signal measurement; ability to automate simulation flows using Python, JavaScript, Ocean scripts, or SKILL.
Nice to have
- Strong problem-solving and debugging skills for signal integrity issues.
- Understanding of CMOS process technologies and their impact on signal integrity.
- Experience building relationships with stakeholders and collaborating across teams.
- Ability to work independently and make sound technical decisions.
Culture & Benefits
- Comprehensive medical, dental, and vision coverage.
- Retirement savings matching, life insurance, and disability coverage.
- Vacation, sick leave, public holidays, and paid family leave.
- Training and development opportunities and commuter benefits.
- Equity grants for full-time employees.
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