Senior RTL Design Engineer (AI)

Location: Hybrid in Austin, Texas or Palo Alto, California, United States

Salary: $120,000–$225,000+ annually

Company

hirify.global develops AI computing hardware based on breakthrough analog technology for edge devices, cloud, data center, industrial, automotive, aerospace, and defense applications.

What you will do

• Design and implement RTL for next-generation AI processors.
• Develop digital dataflow architecture components, including scheduling subsystems, interconnect fabrics, and DMA engines.
• Optimize datapaths, controllers, memory subsystems, and interconnects for performance and power.
• Define microarchitecture and ensure functional correctness with architecture and verification teams.
• Drive timing closure with synthesis and physical design teams.
• Participate in design reviews and improve RTL coding practices and methodologies.

Requirements

• Bachelor’s, Master’s, or Ph.D. in Electrical Engineering, Computer Engineering, or Computer Science.
• 8+ years of industry experience in RTL design, microarchitecture, and architecture development.
• Strong understanding of pipelines, caches, coherence, and memory hierarchies.
• Hands-on experience with scheduling fabrics, high-performance interconnects, DMA engines, memory controllers, or datapath and control logic.
• Proficiency in Verilog/SystemVerilog and RTL coding guidelines, plus familiarity with timing constraints, physical design, and EDA flows.
• Experience with simulation, synthesis, linting, and static timing analysis tools, along with strong problem-solving and communication skills.

Nice to have

• Knowledge of NoC architectures and low-power techniques such as clock gating, power gating, and multi-voltage domains.
• Experience with advanced-node timing closure, PPA optimization, emulation, or FPGA prototyping.
• Familiarity with AI, DSP, or parallel compute architectures.
• Python or similar scripting experience for design automation.

Culture & Benefits

• Collaborative and respectful working environment.
• Supportive environment with the tools needed to deliver complex hardware.
• Professionalism, creativity, integrity, and inclusion are valued.
• Opportunity to contribute to next-generation AI compute hardware.