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Senior Principal Digital IC Design Engineer

182 360 - 273 200$
Формат работы
onsite
Тип работы
fulltime
Грейд
senior
Английский
b2
Страна
US
Вакансия из списка Hirify.GlobalВакансия из Hirify Global, списка международных tech-компаний
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Описание вакансии

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TL;DR
Senior Principal Digital IC Design Engineer (Verilog/SystemVerilog): Designing and implementing micro-architecture and RTL for complex power-management integrated circuits used in high-speed interconnects for hyperscaler data centers with an accent on low-power design, timing, verification, and production-quality implementation. Focus on developing reusable IP, coordinating full-cycle design and verification, bringing up blocks on silicon, and mentoring digital design engineers.

Location: Santa Clara, California, United States

Salary: $182,360–$273,200 per year

Company

hirify.global develops semiconductor solutions and high-performance mixed-signal ICs for enterprise, cloud, AI, and carrier data infrastructure.

What you will do

  • Design, develop, verify, and document micro-architecture and RTL for complex power-management integrated circuits.
  • Work with system and chip architects to deliver industrial-quality digital implementations.
  • Participate in the full design cycle, including micro-architecture documentation, RTL coding, timing specifications, verification planning, and silicon lab bring-up.
  • Create block micro-architecture and register specifications and maintain reusable IP.
  • Review designs and verification execution with cross-functional teams and improve development methodologies.
  • Supervise or mentor digital design engineers.

Requirements

  • Bachelor’s degree in Computer Science, Electrical Engineering, or a related field with 12+ years of relevant experience; alternatively, a master’s degree with 10+ years or a PhD with 5+ years.
  • Extensive experience with Verilog, SystemVerilog, synthesis, static timing analysis, low-power design, SpyGlass, RTL lint, and CDC quality checks.
  • Hands-on scripting experience with Perl or Python.
  • Demonstrated experience delivering production-quality designs on demanding schedules.
  • Eligibility to access export-controlled technology and software under U.S. export control laws is required; an export license review may apply.

Nice to have

  • Expertise in 802.3 standards and SerDes design.
  • Hands-on experience with digital signal processing, error-correction codes, and physical-layer protocols.

Culture & Benefits

  • Employee stock purchase plan with a two-year look-back.
  • Family support programs for balancing work and home life.
  • Mental and physical health resources.
  • Recognition and service awards.
  • Interview participation must be unaided by AI tools unless prior interviewer instruction permits them.

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