Hardware Verification Engineer (SystemVerilog)

Location: Cambridge, England, United Kingdom; the role is also listed for Bristol and London.

Company

hirify.global is a Series B semiconductor startup developing software-driven unified fabric intellectual property and software platforms for single-die and multi-die systems.

What you will do

• Create test plans for highly configurable interconnect IP used across SoCs, chiplets, and multi-chiplet systems.
• Write UVM and SystemVerilog code for test plans, checkers, and scoreboards.
• Collaborate with software teams to define and implement configurable testbenches.
• Work with design teams on test plans, failure debugging, and coverage analysis.

Requirements

• BS or MS degree in Electrical Engineering, Computer Engineering, or Computer Science.
• 8+ years of current hands-on experience in block-level, IP-level, or SoC-level verification.
• Proficiency in Verilog and SystemVerilog, with deep experience building UVM-based testbenches.
• Familiarity with industry-standard EDA tools for simulation and debugging.
• Experience with Python and Arm AMBA protocols, including AXI, APB, and AHB.
• Experience verifying caches, cache coherency, memory subsystems, interconnects, or NoCs, plus strong problem-solving and collaboration skills.

Nice to have

• Understanding of the Arm CHI protocol.
• Experience with formal verification techniques and emulation platforms.

Culture & Benefits

• Performance incentives.
• Comprehensive medical, dental, and vision benefits.
• 401(k) retirement plan.
• Equity.