pythonanalog designmixed signaldlladccadenceintegrated circuitsplldacverilog a
Вакансия из Hirify Global, списка международных tech-компаний Для мэтча и отклика нужен Plus
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Зарплата и рынок
Мало
$107к-157к/год
$120к$140кмедиана$160к
По похожим ролям (50) ~ $140к/год
На СНГ рынке: $1.9к/мес ($1.8к - $2.5к)
55
Средняя вакансия
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Роль четко определена с хорошим стеком технологий, но зарплата значительно ниже рыночных стандартов, что может снизить привлекательность.
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Низкая зарплатаЧетко определенная рольСовременный стек технологий
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Описание вакансии
Текст:
Hirify AI/Оригинал
TL;DR
Principal Engineer - Analog Design (Analog/Mixed-Signal ICs): Designing, simulating, and validating analog IP blocks for mixed-signal SoCs with an accent on multi-GHz PLLs, high-speed circuits, MEMS drivers, and performance I/O pads. Focus on modeling blocks for top-level simulations, validating silicon process devices, and evaluating systems in the laboratory.
Location: Toronto, Canada; onsite role at 67 Yonge Street, 10th Floor.
Annual base salary: $107,000–$157,000 USD, dependent on location, skills, and experience.
Company
hirify.global is a global semiconductor technology company developing products and solutions that power embedded and connected systems.
What you will do
Design specific analog IP blocks in collaboration with analog design leads and architects.
Design, simulate, and validate analog integrated circuits, typically for mixed-signal SoC products.
Simulate analog circuits across process corners and operating conditions.
Develop behavioral models of design blocks for top-level mixed-signal simulations.
Perform block-level validation of silicon process devices and system-level laboratory evaluation.
Contribute to timing-product IP including multi-GHz PLLs, high-speed digital circuits, MEMS drivers, and high-speed I/O pads.
Requirements
Master’s degree or PhD in electrical engineering.
At least 5 years of direct experience working on analog and mixed-signal circuits.
High-speed and analog circuit design experience with ADCs, DACs, filters, PLLs, DLLs, and high-speed I/Os.
Strong fundamentals in circuit theory, circuit design, and layout.
Hands-on scripting and automation experience using SKILL, Python, Perl, and Tcl.
Strong knowledge of Cadence IC design flow and tools.
Strong knowledge of Verilog-A for analog behavioral modeling and simulation.
Nice to have
Expertise in the system design of mixed-signal circuits.
Good communication and teamwork skills, with experience working with multi-site teams.
Culture & Benefits
Work in an environment emphasizing trust, empowerment, respect, diversity, communication, and employee development.
Health benefits begin on the first day.
Benefits include retirement savings plans and an employee stock purchase program with a six-month look-back feature.
Total compensation includes base pay, restricted stock units, and quarterly bonus payments.
Travel requirement is 0%–25%.
Accessibility accommodation is available throughout the hiring process in accordance with Ontario legislation.
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