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System Validation Engineer to Staff Engineer (RISC-V)

Формат работы
onsite
Тип работы
fulltime
Грейд
senior
Английский
b2
Страна
Taiwan
Вакансия из списка Hirify.GlobalВакансия из Hirify Global, списка международных tech-компаний
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Описание вакансии

Текст:
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TL;DR
System Validation Engineer to Staff Engineer (RISC-V): Developing, deploying, and supporting FPGA and emulation environments for RISC-V processor and SoC designs with an accent on system validation, verification methodology, and silicon bring-up. Focus on debugging complex hardware, software, and design failures, implementing test plans, and analyzing coverage and readiness for silicon and software bring-up.

Location: Hsinchu, Taiwan. Right to work in Taiwan and authorization to access export-controlled technology are required.

Company

hirify.global develops high-performance RISC-V compute platforms for artificial intelligence, machine learning, automotive, data center, mobile, and consumer applications.

What you will do

  • Develop, deploy, and support emulation and FPGA environments for RISC-V CoreIP and silicon designs.
  • Bring up silicon designs on FPGA platforms and identify root causes of design, test, and emulator-environment failures.
  • Collaborate with cross-functional teams to define and implement emulation strategies based on product goals.
  • Define emulation test strategies, test frameworks, and test plans.
  • Establish hardware and software readiness for silicon and software bring-up.
  • Debug complex emulation hardware, software, and silicon design issues.

Requirements

  • Solid understanding of processor and SoC architecture, or a strong desire and ability to learn it.
  • More than 3 years of direct system development, validation, and debugging experience on FPGA platforms.
  • Ability to debug processor designs on FPGA platforms.
  • Experience with Linux-based open-source software development.
  • Conscientious and thorough approach to design verification and system validation.
  • Thorough understanding of high-level verification-flow methodology, including test-plan generation, test generation, failure analysis, coverage analysis, and closure.
  • Good interpersonal skills for listening to diverse viewpoints and influencing people across disciplines.
  • Strong dedication to product quality.
  • Familiarity with, or ability to learn, non-standard verification languages and methodologies such as Scala and Chisel.

Culture & Benefits

  • Collaborative, cross-functional environment focused on innovation and product quality.
  • Inclusive workplace committed to diversity and equal opportunity.
  • Employment is contingent on successful background and reference checks.
  • Employment is contingent on authorization to access export-controlled technology under applicable laws, or successful acquisition of required export licenses or approvals.

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