Senior Staff Engineer, Hardware & Silicon Validation (PCIe/Ethernet)

Location: Hsinchu, Taiwan; full-time onsite role.

Company

hirify.global develops semiconductor solutions for enterprise, cloud, AI, and carrier data infrastructure.

What you will do

• Own PCIe/Ethernet PHY validation in the post-silicon environment, including defining, documenting, executing, and reporting the validation and test plan for in-house IP.
• Perform lab-based silicon bring-up and unit testing for PCIe/Ethernet physical and PCS-layer hardware and firmware, extending validation to the PCIe protocol layer.
• Conduct high-speed signal validation and analysis using test equipment to measure eye diagrams, jitter, and BER.
• Diagnose and debug PHY protocol issues using software tools, hardware analyzers, oscilloscopes, meters, and logic or protocol analyzers.
• Lead technical discussions and collaborate with cross-functional teams, external vendors, and customers to resolve post-silicon and customer issues.
• Develop validation automation and perform data analysis using scripting languages.

Requirements

• 8–10 years of experience with high-speed IO testing, debugging, and validation.
• Strong understanding of high-speed SERDES, equalization techniques, and PCIe protocols.
• Strong hands-on lab experience with system bring-up, system testing, and debugging.
• In-depth working knowledge of SERDES characterization equipment, including scopes, BERTs, and network analyzers.
• Strong analytical, problem-solving, written, oral, and communication skills.
• Excellent written and oral English communication skills.
• Experience developing validation automation and analyzing data with scripting languages such as Python or MATLAB.
• Bachelor of Science in Electrical Engineering with 8–10 years of relevant experience, or Master of Science in Electrical Engineering with 6–8 years of relevant experience, in pre/post-silicon validation, stress testing, and PVT testing.

Nice to have

• Working knowledge of PCIe, Ethernet, and/or SAS/SATA SERDES.
• Extensive knowledge of the physical and protocol levels, including PIPE interface, PCS, and MAC, for one or more common high-speed interfaces.
• Working knowledge of board design and the ability to read board schematics and layouts.
• Knowledge of SERDES modeling techniques.

Culture & Benefits

• Eligibility to participate in bonus and equity plans, including a new-hire equity grant and annual equity refreshers.
• Competitive compensation and benefits.
• Collaborative, transparent, and inclusive work environment.
• Tools and resources to support professional growth and development.