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10 часов назад

Lead Physical Design Engineer (AI Chips)

Тип работы
fulltime
Грейд
lead
Английский
b2
Страна
UK
Вакансия из списка Hirify.GlobalВакансия из Hirify Global, списка международных tech-компаний
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TL;DR
Lead Physical Design Engineer (AI Chips): Driving end-to-end physical implementation of next-generation ASIC and SoC designs from synthesis through sign-off with an accent on PPA optimisation, timing closure, power integrity, and manufacturability. Focus on leading full-chip execution, developing EDA flows, integrating DFT and physical verification, and mentoring engineers across advanced AI chip projects.

Location: Bristol, United Kingdom

Company

hirify.global develops chips and systems designed to accelerate inference for frontier AI models, targeting high-speed generation and long-context workloads.

What you will do

  • Drive end-to-end physical implementation of ASIC and SoC designs, including floorplanning, placement, clock tree synthesis, routing, and sign-off.
  • Lead full-chip execution, block ownership, physical design teams, or broader chip-level activities according to project needs.
  • Perform synthesis, static timing analysis, timing closure, and PPA optimisation.
  • Own power planning and analysis, including IR drop and electromigration mitigation.
  • Ensure DRC, LVS, formal verification, and other physical verification requirements are met.
  • Collaborate with RTL, architecture, verification, DFT, and process technology teams while improving EDA flows and mentoring engineers.

Requirements

  • 10+ years of physical design experience for advanced technology nodes such as 7nm, 5nm, or below.
  • Strong proficiency with EDA tools for place and route, STA, and sign-off, including Cadence Innovus, Synopsys Fusion Compiler, or Mentor Graphics Calibre.
  • Strong understanding of CMOS technology, semiconductor physics, process limitations, timing closure, signal integrity, IR drop analysis, and formal verification.
  • Proficiency in TCL, Perl, or Python for automation.
  • Proven ability to own complex designs, lead physical design efforts, mentor engineers, and drive projects to completion.
  • Bachelor’s, Master’s, or PhD degree in Electrical Engineering, Computer Engineering, or a related field.

Nice to have

  • Experience with HPC, AI accelerators, or networking chips.
  • Experience or strong interest in using advanced AI tools and models in engineering workflows.

Culture & Benefits

  • High ownership and autonomy in driving work forward.
  • Rapid iteration and direct collaboration with top leadership.
  • Full-stack collaboration across hardware, software, silicon, and modelling teams.
  • Meaningful equity and ownership participation.
  • Private medical, dental and vision coverage, contributory pension, 25 days of holiday plus bank holidays, and life and critical illness insurance.
  • Inclusive office environment with a focus on diverse perspectives and teamwork.

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