Physical Design Engineer (AI Hardware)

Location: Bangalore, India

Company

hirify.global develops advanced AI hardware and software systems for edge-to-cloud computing, using in-memory computing technology for high-efficiency applications in power-, energy-, and space-constrained environments.

What you will do

• Own RTL-to-GDSII implementation, including floorplanning, placement, clock tree synthesis, routing, and physical verification.
• Drive PPA closure for advanced process nodes at 3nm and below.
• Perform static timing analysis and timing closure, including signal integrity, crosstalk, and CPPR optimization.
• Analyze static and dynamic IR drop and perform electromigration checks for robust power delivery.
• Develop and integrate AI/ML-based automation scripts to optimize physical design flows and reduce turnaround time.

Requirements

• B.Tech or M.Tech in Electrical or Electronics Engineering from a top-tier university.
• 2–4 years of hands-on physical design experience in the semiconductor industry.
• Expert proficiency with industry-standard physical design tools, preferably Innovus.
• Strong knowledge of MCMM closure, low-power design techniques using UPF/CPF, and physical verification.
• Ability to take complete ownership of design blocks and solve complex silicon challenges under tight deadlines.

Nice to have

• Proficiency in Python or Tcl.
• Experience applying AI/ML models to EDA tool automation or predictive PPA analysis.

Culture & Benefits

• Work in a fast-paced startup environment focused on next-generation silicon and AI-driven automation.
• Contribute to high-performance computing technology for edge-to-cloud applications.
• Take ownership of challenging physical design blocks and advanced semiconductor workflows.