12 часов назад
Senior Package Reliability Engineer (Semiconductor Packaging)
166 900 - 240 000$
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Описание вакансии
Текст:
TL;DR
Senior Package Reliability Engineer (Semiconductor Packaging): Characterizing and qualifying advanced 2.5D/3D semiconductor packages with an accent on thermal and thermomechanical analysis, materials selection, and reliability validation. Focus on developing finite element models, correlating warpage and coplanarity data, predicting reliability lifetimes, and leading package DFMEA/FMEA activities.
Location: San Jose, California, United States
Salary: $166,900–$240,000 USD annually for the Bay Area, California.
Company
is a pure-play FPGA solutions provider developing programmable technologies for AI, cloud, networking, and edge markets.
What you will do
- Characterize and qualify advanced 2.5D/3D semiconductor packages.
- Partner with package development, assembly, and manufacturing teams to select substrates and assembly materials.
- Develop and maintain thermal and thermomechanical finite element models using tools such as Ansys and Abaqus.
- Define and interpret coplanarity, warpage, and second-level reliability data collection strategies.
- Lead package reliability evaluations against JEDEC, MIL-STD, IPC, and AEC standards.
- Develop lifetime prediction models, customer reports, and package DFMEA/FMEA analyses.
Requirements
- Master's degree in Mechanical Engineering, Materials Science, Packaging Engineering, or a related technical field.
- 8+ years of experience in semiconductor package thermal and thermomechanical analysis.
- 8+ years of experience with thermal and thermomechanical simulation tools such as Ansys, Abaqus, or COMSOL.
- 8+ years of experience with advanced 2.5D, 3D, and heterogeneous integration packaging technologies.
- 3+ years of experience applying reliability statistics, failure analysis, and lifetime modeling techniques.
- 3+ years of experience developing Python scripts or software for automation, simulation workflows, data analysis, and post-processing.
Nice to have
- Deep understanding of thermal, mechanical, and thermomechanical characteristics of advanced flip-chip packages.
- Experience correlating thermomechanical simulations with dynamic warpage and surface-mount system-level assembly behavior.
- Experience developing customer-facing packaging risk assessment materials.
Culture & Benefits
- Regular full-time employment.
- Shift 1 schedule in the United States.
- Incentive opportunities based on individual and company performance.
- Applicants must be eligible for any required U.S. export authorizations.
- Artificial intelligence is used to screen, assess, or select applicants.
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