IC Package Mechanical FEA Engineer (FEA)

Location: San Jose, United States

Company

hirify.global is a well-funded startup developing photonics infrastructure, optical interconnects, and photonic engines for AI supercomputing and high-performance computing.

What you will do

• Perform FEA simulations for stress, strain, warpage, delamination, thermal cycling, and reliability risks across flip-chip, fan-out, 2.5D/3D IC, chiplet-based, and TSV package architectures.
• Define simulation requirements, interpret complex results, and provide actionable design and process recommendations.
• Assess new materials, interconnect structures, and process flows for thermo-mechanical reliability and technology road mapping.
• Lead DOE studies and sensitivity analyses to identify key reliability and performance drivers.
• Collaborate with design, photonics, manufacturing, reliability, and vendor teams to develop robust and scalable package architectures.

Requirements

• Bachelor’s degree in Mechanical Engineering or a related field with 12+ years of FEA experience, Master’s degree with 10+, or PhD with 7+.
• Deep expertise in advanced packaging, including flip-chip, FOWLP, 2.5D/3D integration, chiplets, and TSVs.
• Strong understanding of polymers, metals, ceramics, and thermo-mechanical interactions.
• Experience with die attach, underfill, molding, bumping, and reflow processes.
• Proficiency with Ansys Classic/Mechanical and Abaqus, including model calibration using empirical data, mechanical testing, and metrology.
• Strong technical communication, documentation, organizational, and cross-functional collaboration skills.

Culture & Benefits

• Work in a globally distributed R&D organization.
• Collaborate with experienced engineers on photonic integration and advanced semiconductor packaging.
• Contribute to products for AI, networking, HPC, and 5G infrastructure.
• Operate in a fast-moving startup environment with significant technical ownership.