Power Management Design Engineer (RISC-V)

Location: Santa Clara, California, United States. Candidates must provide satisfactory proof of the right to work in the United States and be authorized to access export-controlled technology or qualify for required export licenses.

Base pay range: $158,760–$194,040 per year, plus potential incentive compensation or equity.

Company

hirify.global develops configurable RISC-V CPU, interconnect, and system-on-chip intellectual property for high-performance and data-intensive applications.

What you will do

• Define power-management requirements with the architecture team.
• Architect, design, and implement clocking, reset, and power-management solutions for CPU and SoC IP.
• Develop microarchitectures and maintain clear technical specifications and documentation.
• Perform initial sandbox verification and collaborate on verification plans and test execution.
• Work with physical implementation engineers to optimize designs for frequency, area, and power.
• Partner with software engineers to enable and optimize power-management features.

Requirements

• 3+ years of recent industry experience designing CPU and SoC clocking, reset, and power-management logic.
• Experience with high-performance, energy-efficient CPU and SoC designs from architecture through tapeout.
• Expertise in clock distribution, dynamic clocking, clock gating, clock-boundary crossings, PMU design, power sequencing, retention, DVFS, and di/dt mitigation.
• Proficiency in RTL design using Verilog, SystemVerilog, or VHDL, plus RTL quality checks including Lint, CDC, and RDC.
• Understanding of DFT, MBIST, debug, error handling, and power-aware simulation.
• BS/MS degree in EE, CE, CS, or a related technical discipline, or equivalent experience.

Nice to have

• Experience with AMBA protocols including AXI, AHB, and APB, and AMBA low-power interfaces such as P-channel and Q-channel.
• Experience with Scala/Chisel, Bluespec, or another hardware-description DSL.
• Knowledge of RISC-V architecture, SpyGlass, Git/GitHub, Jira, or Confluence.

Culture & Benefits

• Collaborative engineering environment focused on high-quality hardware design.
• Flexible paid time off.
• Health, vision, and dental benefits.
• 401(k) plan and employee stock option program.
• Equal employment opportunity and inclusive workplace commitments.