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6 часов Π½Π°Π·Π°Π΄

Distinguished Engineer - Digital Design (AI)

212Β 200 - 314Β 020$
Π€ΠΎΡ€ΠΌΠ°Ρ‚ Ρ€Π°Π±ΠΎΡ‚Ρ‹
onsite
Π’ΠΈΠΏ Ρ€Π°Π±ΠΎΡ‚Ρ‹
fulltime
Π“Ρ€Π΅ΠΉΠ΄
senior
Английский
b2
Π‘Ρ‚Ρ€Π°Π½Π°
US
Вакансия ΠΈΠ· списка Hirify.GlobalВакансия ΠΈΠ· Hirify Global, списка ΠΌΠ΅ΠΆΠ΄ΡƒΠ½Π°Ρ€ΠΎΠ΄Π½Ρ‹Ρ… tech-ΠΊΠΎΠΌΠΏΠ°Π½ΠΈΠΉ
Для мэтча ΠΈ ΠΎΡ‚ΠΊΠ»ΠΈΠΊΠ° Π½ΡƒΠΆΠ΅Π½ Plus

ΠœΡΡ‚Ρ‡ & Π‘ΠΎΠΏΡ€ΠΎΠ²ΠΎΠ΄

Для мэтча с этой вакансиСй Π½ΡƒΠΆΠ΅Π½ Plus

ОписаниС вакансии

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TL;DR

Distinguished Engineer - Digital Design (AI/SoC): Designing and implementing high‑quality customer silicon for advanced AI and XPU programs with an accent on micro-architecture and low‑power RTL coding. Focus on shaping design strategy, building a technical team in San Diego, and delivering differentiated SoC solutions for next‑generation compute platforms.

Location: San Diego, CA, USA

Salary: $212,200 – $314,020 per annum

Company

hirify.global provides semiconductor solutions that serve as essential building blocks for data infrastructure across enterprise, cloud, AI, and carrier architectures.

What you will do

  • Define the micro-architecture and write specifications for strategic custom SoC initiatives.
  • Implement designs using low-power RTL coding techniques and collaborate on verification test plans and coverage analysis.
  • Apply SVA assertions for dynamic simulation and formal verification.
  • Lead the establishment of the San Diego design organization, shaping its technical DNA and methodology.
  • Collaborate with physical design and software teams to ensure products meet customer use cases and performance targets.
  • Support post-silicon bring-up in the lab and provide expert debug support.

Requirements

  • Bachelor's degree in CS/EE with 17+ years of experience, Master's with 12-15+ years, or PhD with 10-12+ years.
  • Fluency in SystemVerilog RTL coding and expertise in PCIe and CXL protocols.
  • Deep knowledge of modern SoC architectures, including AXI, DDR, and Ethernet.
  • Experience in micro-architecture for complex ASIC products (Chip I/O, shared memory, embedded processors).
  • Proficiency in synthesis, static-timing closure, formal verification, and gate-level simulations.
  • Must be eligible to access export-controlled information under U.S. law.

Nice to have

  • Experience in designing high-speed (>1 GHz) high-performance embedded processor SoC products.
  • Knowledge of scripting languages such as Python, Perl, Tcl, and UNIX shell.

Culture & Benefits

  • Employee stock purchase plan with a 2-year look back.
  • Comprehensive family support programs to balance work and home life.
  • Robust mental and physical health resources.
  • Recognition and service awards to celebrate milestones.

Π‘ΡƒΠ΄ΡŒΡ‚Π΅ остороТны: Ссли Ρ€Π°Π±ΠΎΡ‚ΠΎΠ΄Π°Ρ‚Π΅Π»ΡŒ просит Π²ΠΎΠΉΡ‚ΠΈ Π² ΠΈΡ… систСму, ΠΈΡΠΏΠΎΠ»ΡŒΠ·ΡƒΡ iCloud/Google, ΠΏΡ€ΠΈΡΠ»Π°Ρ‚ΡŒ ΠΊΠΎΠ΄/ΠΏΠ°Ρ€ΠΎΠ»ΡŒ, Π·Π°ΠΏΡƒΡΡ‚ΠΈΡ‚ΡŒ ΠΊΠΎΠ΄/ПО, Π½Π΅ Π΄Π΅Π»Π°ΠΉΡ‚Π΅ этого - это мошСнники. ΠžΠ±ΡΠ·Π°Ρ‚Π΅Π»ΡŒΠ½ΠΎ ΠΆΠΌΠΈΡ‚Π΅ "ΠŸΠΎΠΆΠ°Π»ΠΎΠ²Π°Ρ‚ΡŒΡΡ" ΠΈΠ»ΠΈ ΠΏΠΈΡˆΠΈΡ‚Π΅ Π² ΠΏΠΎΠ΄Π΄Π΅Ρ€ΠΆΠΊΡƒ. ΠŸΠΎΠ΄Ρ€ΠΎΠ±Π½Π΅Π΅ Π² Π³Π°ΠΉΠ΄Π΅ β†’