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10 часов назад

Functional Safety Architect (FPGA)

149 100 - 215 000$
Тип работы
fulltime
Грейд
senior
Английский
b2
Страна
US
Вакансия из списка Hirify.GlobalВакансия из Hirify Global, списка международных tech-компаний
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Описание вакансии

Текст:
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TL;DR
Functional Safety Architect (FPGA): Leading functional safety architecture and certification activities for semiconductor devices and IP across avionics, space, defense, automotive, and industrial applications with an accent on safety concepts, fault analysis, and standards compliance. Focus on defining safety mechanisms, decomposing ASIL/SIL requirements, validating diagnostic coverage, and building traceable safety cases for certification.

Location: San Jose, California, United States

Salary: $149,100–$215,000 USD per year for the Bay Area California market

Company

hirify.global is an independent FPGA solutions provider developing programmable technologies for AI, cloud, networking, edge, avionics, space, defense, automotive, and industrial markets.

What you will do

  • Lead functional safety activities across semiconductor and IP development projects.
  • Own device safety architecture and develop technical safety concepts, mechanisms, and decomposed requirements for IP sub-blocks.
  • Perform FTA, FMEA, DFA, and related safety analyses to address common-cause and cascading failures, fault tolerance, independence, and freedom from interference.
  • Define safety architecture techniques including lockstep CPUs, ECC memories, watchdogs, and redundancy.
  • Collaborate with architecture, RTL design, physical design, firmware, software, and verification teams on safety designs and verification strategies.
  • Prepare safety-case evidence, manage diagnostic coverage metrics, and support functional safety management and certification.

Requirements

  • Bachelor’s or Master’s degree in Electrical Engineering or a related field, with 10+ years of silicon industry experience, or a Master’s degree with 8+ years of experience.
  • 7+ years of professional safety experience, including functional safety certification such as FSCP or an equivalent credential.
  • 7+ years certifying ASIC, PLD, or CPU devices from concept through certification with Exida, TÜV, or an equivalent organization.
  • 7+ years of experience with SysML, FMEA/FMEDA, FTA, HAZOP, and requirements-management tools such as Jama.
  • Experience with ISO 26262, IEC 61508, and relevant standards such as DO-254 and DO-178; support for SIL3/ASIL D systematic capability is expected.
  • Applicants must be eligible for any required U.S. export authorizations.

Nice to have

  • Familiarity with RTL coding, SoC architecture simulation, and debugging.
  • Experience creating safety cases, safety management plans, and safety manuals.
  • Functional Safety Management or safety manager experience supporting SC3/ASIL D.
  • U.S. citizenship.
  • Customer engagement experience for safety-oriented SoC applications and participation in complex, multi-year programs.

Culture & Benefits

  • Work with a SoC architecture and development organization focused on safety-rated devices and IP.
  • Collaborate with internal engineering teams and external stakeholders, assessors, and certification organizations.
  • Incentive opportunities are available based on individual and company performance.
  • Regular full-time employment.

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