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16 часов назад

Principal Design Verification Engineer (ASIC/SystemVerilog)

185 000 - 230 000$
Тип работы
fulltime
Грейд
senior
Английский
b2
Страна
US
Вакансия из списка Hirify.GlobalВакансия из Hirify Global, списка международных tech-компаний
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Описание вакансии

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TL;DR
Principal Design Verification Engineer (ASIC/SystemVerilog): Leading full-lifecycle functional verification for advanced SoCs used in server and networking applications with an accent on SystemVerilog/UVM, emulation, and coverage analysis. Focus on developing constrained-random test environments, debugging switching architectures and packet-processing engines, and closing functional coverage gaps.

Location: California, United States

Salary: $185,000–$230,000 per year, depending on experience, level, and business need. Additional discretionary bonus, incentives, and benefits may be available.

Company

hirify.global provides rack-scale AI infrastructure through semiconductor-based connectivity solutions and software for hyperscalers and ecosystem partners.

What you will do

  • Lead functional verification of advanced ASICs, including planning, test development, execution, and coverage analysis.
  • Develop and execute directed and constrained-random verification using SystemVerilog, UVM, and industry-standard tools.
  • Collaborate with software and system validation teams on emulation-platform test plans.
  • Debug test failures, analyze coverage, and close functional verification gaps.
  • Work with RTL designers to troubleshoot and resolve design issues.
  • Drive verification strategy and methodology for SoCs used in server and networking applications.

Requirements

  • Bachelor’s degree in Electrical Engineering; a Master’s degree is preferred.
  • 8+ years of SoC verification experience, particularly in server and networking applications.
  • Expertise in SystemVerilog/UVM and experience across the full verification lifecycle.
  • Proficiency with industry-standard simulators, version control, and regression systems.
  • Strong debugging, coverage analysis, test-sequence, stimulus-generation, and verification-hole identification skills.
  • Experience verifying switching architectures, including packet-processing and forwarding engines, with the ability to work independently and communicate effectively.

Nice to have

  • Experience with third-party Verification IP for PCIe, Ethernet, or InfiniBand.
  • Background in Network-on-Chip architectures for smart NICs and AI accelerators.
  • Knowledge of Ethernet/PCIe switching and central buffer architectures.
  • Experience with emulation platforms and hardware-software co-verification.

Culture & Benefits

  • Bonus, incentives, and benefits may be available based on business eligibility.
  • Applications are encouraged from candidates with diverse backgrounds and experiences.

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