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11 часов назад

Technical Staff Engineer - Verification (FPGA)

91 000 - 232 000$
Тип работы
fulltime
Грейд
senior
Английский
b2
Страна
US
Вакансия из списка Hirify.GlobalВакансия из Hirify Global, списка международных tech-компаний
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Текст:
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TL;DR
Technical Staff Engineer - Verification (FPGA) (SystemVerilog/UVM): Verifying complex SoC subsystems and next-generation secure, low-power FPGA devices with an accent on constrained-random, formal, C-based, power-aware, and gate-level verification. Focus on developing reusable UVM environments, integrating AI/ML-enabled EDA workflows, collaborating on emulation and hardware prototyping, and supporting first-silicon success.

Location: Chandler, Arizona, United States

Annual base salary: $91,000–$232,000, plus restricted stock units and quarterly bonuses.

Company

hirify.global develops semiconductor products and FPGA solutions for technologies used worldwide, with a large global workforce and structured employee-development programs.

What you will do

  • Verify complex subsystems and SoCs for next-generation, highly secure, low-power FPGA devices.
  • Develop and maintain reusable UVM-based test benches and verification environments.
  • Apply constrained-random, formal, C-based, RTL, power-aware, and gate-level verification methodologies.
  • Use AI/ML-enabled verification methodologies and automate verification flows.
  • Collaborate with architecture, design, emulation, and hardware prototyping teams to establish unified verification methods and support first-silicon success.
  • Mentor junior verification engineers and contribute to post-silicon debug activities.

Requirements

  • 12+ years of functional verification experience with complex SoC designs.
  • Expertise in SystemVerilog, UVM, formal verification, methodology development, and tool automation.
  • Experience with AI/ML-driven EDA tools, flow integration, and scripting using Python, TCL/TK, and C/C++.
  • Understanding of ARM or RISC-V SoC architectures and expertise in at least two relevant subsystems or peripherals, such as PCIe, DDR, MIPI, Ethernet, USB, CPU subsystems, or security and cryptography IPs.
  • Exposure to emulation, FPGA-based acceleration, hardware prototyping, simulation/emulation flows, and post-silicon debug.
  • BS or MS degree in Electrical or Electronic Engineering, plus strong debugging, communication, and cross-functional collaboration skills.

Nice to have

  • Strong understanding of FPGA architecture.
  • Experience with coverage-driven verification and ML-based optimization.
  • Knowledge of the complete SoC RTL-to-GDS-to-silicon release flow.

Culture & Benefits

  • Full-time employment within a large semiconductor organization.
  • Health benefits begin on the first day.
  • Retirement savings plans and an employee stock purchase program with a two-year look-back feature.
  • Leadership and employee-development programs supporting career growth.
  • Travel requirement of approximately 0%–25%.

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