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14 часов назад

Principal ATE Test Engineer (PCIe)

209 000 - 240 000$
Тип работы
fulltime
Грейд
senior
Английский
b2
Страна
US
Вакансия из списка Hirify.GlobalВакансия из Hirify Global, списка международных tech-компаний
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TL;DR
Principal ATE Test Engineer (PCIe) (Mixed-Signal SoC and High-Speed Connectivity): Developing and leading ATE test strategies, hardware, and programs for complex mixed-signal SoC products from initial samples through high-volume production with an accent on PCIe, Ethernet, SerDes, DFT, and manufacturing collaboration. Focus on silicon and ATE bring-up, wafer sort and final test, high-speed load board design, bench-ATE correlation, and optimizing tester resources and test time.

Location: San Jose, California, United States

Base salary: $209,000–$240,000 USD per year

Company

hirify.global provides rack-scale AI infrastructure through connectivity solutions based on CXL, Ethernet, NVLink, PCIe, and UALink technologies, supported by its COSMOS software suite.

What you will do

  • Develop and oversee ATE test strategies for complex mixed-signal silicon SoC products.
  • Define, implement, and own ATE test plans from design and initial samples through high-volume production ramp.
  • Collaborate with design teams and manufacturing partners on test strategy, platform selection, and product execution.
  • Design and develop ATE hardware for wafer sort and final test, including high-speed load boards.
  • Implement ATE patterns and DFT-based tests to maximize defect and parametric coverage while reducing test time.
  • Lead silicon and ATE bring-up, bench-ATE correlation, debugging, and production test optimization.

Requirements

  • Bachelor’s degree in Electrical Engineering; a Master’s degree is preferred.
  • At least 8 years of experience releasing complex SoC or silicon products to high-volume manufacturing.
  • Hands-on experience developing high-speed mixed-signal SoC test programs and hardware across multiple test platforms.
  • Expertise in PCIe, Ethernet, InfiniBand, DDR, NVMe, USB, SerDes, and control interfaces such as I2C, I3C, SPI, MDIO, and JTAG.
  • Experience with Teradyne or Advantest 93k ATE platforms, protocol analyzers, oscilloscopes, and high-speed SerDes production testing at 16 Gbps or higher.
  • Proficiency in at least one modern programming language, such as C, C++, or Python, with the ability to execute multiple tasks independently.

Nice to have

  • Fluent data processing with high-level programming languages.
  • Experience running external loopback at wafer sort.
  • Familiarity with modern databases.
  • Basic knowledge of RF testing on ATE platforms.

Culture & Benefits

  • Collaborative work with high-caliber engineering teams and manufacturing partners.
  • Entrepreneurial, open-minded, and execution-focused working style.
  • Inclusive environment that encourages applications from people with diverse backgrounds and experiences.

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