Вакансия из Hirify Global, списка международных tech-компаний Для мэтча и отклика нужен Plus
Пожаловаться
Зарплата и рынок
ЗП не указана
На похожих ролях по рынку
$136к$167кмедиана$200к
50 в выборке
На СНГ рынке: $1.9к/мес ($1.8к - $3к)
75
Хорошая вакансия
развернуть
Роль четко определена с ясным акцентом на системы RISC-V, но отсутствие информации о зарплате затрудняет оценку общей привлекательности.
Кликните для подробной информации
Нет информации о зарплатеПродуктовая компанияСильный технический фокусСотрудничество в культуре
Оценка от Hirify AI
Мэтч & Сопровод
Для мэтча с этой вакансией нужен Plus
Подключить Plus
Описание вакансии
Текст:
Hirify AI/Оригинал
TL;DR
Staff System Validation Engineer (RISC-V): Developing, deploying, and supporting emulation and FPGA environments for processor and SoC designs with an accent on system validation, test strategy, and silicon bring-up. Focus on debugging complex hardware, software, and design issues, analyzing failures and coverage, and establishing readiness for silicon and software bring-up.
Location: Hsinchu, Taiwan. Onsite role. Right to work in Taiwan is required.
Company
hirify.global develops high-performance RISC-V compute platforms for applications including artificial intelligence, machine learning, automotive, data center, mobile, and consumer products.
What you will do
Develop, deploy, and support emulation and FPGA environments for RISC-V CoreIP designs.
Bring up silicon designs on FPGA platforms and identify root causes of design, test, and emulator-environment failures.
Collaborate with cross-functional teams to define and implement emulation strategies based on product goals.
Define emulation test strategies, test frameworks, and test plans.
Establish hardware and software readiness for silicon and software bring-up.
Debug complex emulation hardware, software, and silicon design issues.
Requirements
More than 5 years of direct system development, validation, and debugging experience on FPGA platforms.
Solid understanding of processor and SoC architecture, or a strong ability and desire to learn it.
Ability to debug processor designs on FPGA platforms.
Experience with Linux-based open-source software development.
Conscientious and thorough approach to design verification and system validation.
Thorough understanding of high-level verification-flow methodology, including test-plan generation, test generation, failure analysis, coverage analysis, and closure.
Good interpersonal skills, including listening to diverse viewpoints and influencing people across disciplines.
Strong dedication to product quality.
Familiarity with, or ability to learn, non-standard verification languages and methodologies such as Scala and Chisel.
Nice to have
FuSa or RAS system-level validation experience.
Culture & Benefits
Cross-functional collaboration across hardware, software, emulation, and silicon disciplines.
Inclusive workplace committed to diversity and equal opportunity.
Employment is contingent on successful background and reference checks.
Employment is contingent on authorization to access export-controlled technology or successful acquisition of required export licenses or approvals.
Будьте осторожны: если работодатель просит войти в их систему, используя iCloud/Google, прислать код/пароль, запустить код/ПО, не делайте этого - это мошенники. Обязательно жмите "Пожаловаться" или пишите в поддержку. Подробнее в гайде →