Staff Design Verification Engineer (RISC-V)

Location: Hsinchu, Taiwan. Right to work in Taiwan is required. Access to export-controlled technology is subject to authorization or required export licenses.

Company

hirify.global develops high-performance RISC-V compute platforms for AI, machine learning, automotive, data center, mobile, and consumer applications.

What you will do

• Own verification planning and execution for L2/L3 cache features from block level through subsystem integration.
• Develop verification environments, checkers, scoreboards, assertions, stimulus, and coverage models.
• Create directed and constrained-random tests for coherency, ordering, concurrency, backpressure, flow control, and error scenarios.
• Analyze failures, isolate root causes, and drive fixes across specifications, RTL, assertions, testbenches, and test content.
• Collaborate with architecture, design, and verification teams to clarify requirements and improve verification quality.
• Close coverage gaps and contribute reusable methodology, automation, and debug improvements.

Requirements

• Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field.
• 7+ years of experience in ASIC, CPU, or SoC design verification with ownership of complex block- or subsystem-level verification.
• Strong hands-on expertise in SystemVerilog and UVM-based verification.
• Strong understanding of cache architecture, memory hierarchy, cache coherency, computer architecture, and microarchitecture.
• Experience building reusable testbenches, assertions, checkers, scoreboards, coverage models, and debug infrastructure.
• Experience with coverage analysis and closure, constrained-random verification, and metrics-driven signoff.

Nice to have

• Experience verifying multiple levels of private and shared caches.
• Experience with memory consistency, weak ordering, and multicore verification.
• Experience with performance-oriented verification, formal techniques, or emulation/FPGA-assisted debug.
• Familiarity with Python, C/C++, or scripting for verification automation.
• Ability to influence technical direction across architecture, design, and verification teams.

Culture & Benefits

• Individual-contributor role with opportunities to improve team-wide verification methodology and productivity.
• Close collaboration across architecture, design, and verification teams.
• Inclusive workplace committed to diversity and equal opportunity.
• Employment is contingent on successful background and reference checks.