10 часов назад
FPGA Silicon Design Verification Engineer (FPGA)
Мэтч & Сопровод
Для мэтча с этой вакансией нужен Plus
Описание вакансии
Текст:
TL;DR
FPGA Silicon Design Verification Engineer (SystemVerilog/UVM): Developing and executing pre-silicon verification for FPGA IP blocks, subsystems, and SoC-level designs with an accent on functional coverage, protocol verification, and reusable testbench environments. Focus on debugging simulation and emulation failures, creating assertions and constrained-random tests, driving verification closure, and supporting first-pass silicon success.
Location: Penang 15, Penang, Malaysia
Company
develops FPGA and hardware technologies.
What you will do
- Develop verification plans for FPGA IP blocks, subsystems, and SoC-level designs.
- Build and maintain reusable SystemVerilog/UVM environments, testbenches, sequences, scoreboards, monitors, agents, and coverage models.
- Create directed and constrained-random tests, assertions, and functional, code, and assertion coverage metrics.
- Debug design failures through simulation, emulation, waveform analysis, and protocol analyzers.
- Collaborate with RTL designers, architects, firmware, and validation teams to resolve functional and performance issues.
- Drive verification closure and quality signoff before tape-out or FPGA release, while supporting post-silicon bring-up and methodology improvements.
Requirements
- Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field.
- 3+ years of digital design verification experience for FPGA or ASIC products.
- Strong expertise in SystemVerilog, UVM, assertion-based verification, and constrained-random verification.
- Understanding of clock domain crossings, reset synchronization, pipelines, state machines, and memory architectures.
- Experience with Synopsys VCS, Cadence Xcelium, or Siemens QuestaSim, plus waveform-based debugging.
- Proficiency with Python, Perl, Tcl, or Shell scripting and Git or equivalent version control.
Nice to have
- Experience verifying networking, storage, compute acceleration, or high-speed interface FPGA IP.
- Knowledge of PCIe, Ethernet, AXI/AHB/APB, DDR, CXL, and serial communication protocols.
- Familiarity with formal verification, FPGA prototyping, emulation, CI/CD, automated regression, DFT, and silicon bring-up.
- Experience with Intel () or AMD/Xilinx FPGA platforms.
Culture & Benefits
- Regular full-time position.
- Shift 1 schedule aligned with Malaysia.
- Collaborative work with hardware development, design, architecture, firmware, and validation teams.
- Focus on accountability, integrity, analytical problem-solving, quality, and execution.
Будьте осторожны: если работодатель просит войти в их систему, используя iCloud/Google, прислать код/пароль, запустить код/ПО, не делайте этого - это мошенники. Обязательно жмите "Пожаловаться" или пишите в поддержку. Подробнее в гайде →