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4 дня назад

IC Verification Engineer (ASIC)

Формат работы
onsite
Тип работы
fulltime
Английский
b2
Страна
UK
Вакансия из списка Hirify.GlobalВакансия из Hirify Global, списка международных tech-компаний
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Описание вакансии

Текст:
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TL;DR
IC Verification Engineer (ASIC): Developing and verifying next-generation Raspberry Pi silicon, including IP and chip-level verification plans, test benches, and functional coverage with an accent on SystemVerilog, Python, UVM, embedded C, and complex IP protocols. Focus on analyzing non-trivial test failures, performing low-power and gate-level simulations, and supporting the flow from synthesis through silicon sign-off.

Location: Cambridge, England, United Kingdom; onsite with full-time office attendance required

Company

hirify.global develops its own silicon, including microcontrollers and chips for the hirify.global platform, with the ASIC team covering the flow from specification through production.

What you will do

  • Own IP-level and chip-level verification planning and execution.
  • Compose detailed verification plans and create test benches from scratch or with shared verification components.
  • Work closely with design engineers throughout the ASIC design flow.
  • Analyze and debug non-trivial test failures.
  • Support verification activities from synthesis through silicon sign-off.

Requirements

  • Hands-on experience with at least three projects.
  • Experience creating test benches using SystemVerilog, Python, or UVM.
  • Experience writing embedded C, ideally for Cortex-M-class microcontrollers.
  • Technical understanding of at least one complex IP protocol, such as PCIe, HDMI, USB, SDIO, or AMBA bus architectures.
  • Experience writing functional coverage and SVA, with a good understanding of front-end design processes and low-power simulations.
  • Ability to plan and execute verification tasks, analyze failures, and communicate effectively.

Nice to have

  • SoC verification experience involving memory caches, DMA, or security architectures such as TrustZone.
  • Formal verification experience with Jasper or similar tools.
  • Experience with Cadence simulation flows, including gate-level simulation.
  • Scripting experience with Bash, TCL, Make, or YAML.

Culture & Benefits

  • Work within a small ASIC team involved in all stages of silicon development.
  • Employer pension contribution of 8% when contributing 4% of gross salary through the salary sacrifice scheme.
  • Life assurance of four times base salary.
  • Income protection covering 75% of base salary in cases of qualifying long-term illness or absence.
  • Private medical insurance and access to an electric vehicle salary sacrifice scheme, subject to eligibility.

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