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2 дня назад

Silicon Photonics Design Engineer

Формат работы
onsite
Тип работы
fulltime
Грейд
junior
Английский
b2
Страна
Singapore
Вакансия из списка Hirify.GlobalВакансия из Hirify Global, списка международных tech-компаний
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TL;DR
Silicon Photonics Design Engineer (Silicon Photonics/PICs): Designing and validating high-speed silicon photonic integrated circuits from concept through tapeout and silicon bring-up with an accent on modulators, photodetectors, passive components, and multi-domain simulation. Focus on achieving 200G/lane+ bandwidth, co-designing with electronics and packaging teams, correlating measurements with simulations, and driving production-bound design iterations.

Location: Singapore; on-site

Company

hirify.global develops production-bound silicon photonic systems for AI infrastructure and hyperscale applications.

What you will do

  • Design and optimize silicon photonic devices and circuits, including high-speed MZI and ring modulators, photodetectors, receivers, couplers, filters, and routing components.
  • Run electromagnetic, circuit, and thermal simulations to meet bandwidth, insertion-loss, extinction-ratio, and efficiency targets.
  • Implement PIC layouts using foundry PDKs and support tapeout flows.
  • Co-design photonic integrated circuits with electronics and packaging teams for CPO/NPO systems, accounting for RF effects, parasitics, signal integrity, and thermal constraints.
  • Support silicon bring-up and characterization by correlating measurements with simulations and driving design improvements.
  • Contribute to design libraries, modeling, and methodology development.

Requirements

  • PhD in Electrical Engineering, Physics, or a related field, preferably in silicon photonics or a closely related area.
  • 0–5 years of relevant experience, including fresh PhD graduates.
  • Experience designing and simulating silicon photonic devices or PICs, with a strong understanding of guided-wave optics and device physics.
  • Familiarity with Lumerical, COMSOL, or equivalent simulation tools.
  • Exposure to PIC layout and tapeout flows, including PDK and DRC/LVS processes.
  • Basic understanding of optical communication systems and/or RF effects.

Nice to have

  • Experience with high-speed devices exceeding 100 GHz bandwidth or equivalent.
  • Exposure to CPO/NPO or optical transceiver architectures.
  • Familiarity with SiPh and III-V integration.
  • Experience with inverse design or adjoint methods, such as Meep.

Culture & Benefits

  • Work on real products operating at 200G/lane+ rather than research prototypes.
  • Contribute directly to AI infrastructure and hyperscale systems.
  • Move through fast design-to-silicon-to-system iteration cycles.
  • Take ownership early in the career.
  • Receive a comprehensive benefits package including health insurance.
  • Collaborate with engineering and R&D teams.

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