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14 часов Π½Π°Π·Π°Π΄

Expert IC Package Design Lead (Semiconductor)

Π’ΠΈΠΏ Ρ€Π°Π±ΠΎΡ‚Ρ‹
fulltime
Π“Ρ€Π΅ΠΉΠ΄
lead
Английский
b2
Π‘Ρ‚Ρ€Π°Π½Π°
Israel
Вакансия ΠΈΠ· списка Hirify.GlobalВакансия ΠΈΠ· Hirify Global, списка ΠΌΠ΅ΠΆΠ΄ΡƒΠ½Π°Ρ€ΠΎΠ΄Π½Ρ‹Ρ… tech-ΠΊΠΎΠΌΠΏΠ°Π½ΠΈΠΉ
Для мэтча ΠΈ ΠΎΡ‚ΠΊΠ»ΠΈΠΊΠ° Π½ΡƒΠΆΠ΅Π½ Plus

ΠœΡΡ‚Ρ‡ & Π‘ΠΎΠΏΡ€ΠΎΠ²ΠΎΠ΄

Для мэтча с этой вакансиСй Π½ΡƒΠΆΠ΅Π½ Plus

ОписаниС вакансии

ВСкст:
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TL;DR
Expert IC Package Design Lead (Semiconductor): Owning the architecture, design, qualification, and production release of advanced IC packages for high-performance connectivity silicon with an accent on signal integrity, power integrity, thermal performance, and manufacturability. Focus on designing complex BGA, FCBGA, FCCSP, interposer, and chiplet-based packages, driving OSAT collaboration, and resolving reliability and production-ramp challenges.

Location: Israel

Company

hirify.global develops rack-scale AI infrastructure and semiconductor-based connectivity solutions integrating CXL, Ethernet, NVLink, PCIe, UALink, and software technologies.

What you will do

  • Own IC package design from architecture and feasibility through detailed design, qualification, tape-out, and high-volume manufacturing.
  • Define package architectures and technology selections, including organic substrates, advanced laminates, interposers, and 2.5D/3D chiplet packaging.
  • Lead package-level signal integrity, power integrity, thermal, mechanical, and cost trade-offs for high-speed, high-power devices.
  • Drive package layout, substrate routing, bump and ball maps, stack-ups, material selection, and mechanical constraints.
  • Collaborate with silicon, SerDes, system, SI/PI, reliability, manufacturing, OSAT, and substrate partners.
  • Lead risk assessment, failure analysis, corrective actions, NPI, qualification, vendor audits, and product sustainment.

Requirements

  • 10+ years of hands-on IC package design experience for high-performance semiconductor products, with ownership from concept through tape-out.
  • Expert proficiency with Cadence APD, SiP, or equivalent IC package design tools.
  • Experience designing complex BGA, FCBGA, and FCCSP packages.
  • Strong expertise in package architecture and integration, including stack-ups, bump and ball maps, constraints, SMT integration, and package BOM ownership.
  • Deep understanding of package-level signal, power, and thermal integrity, plus manufacturing and release processes including DRC, LVS, DFM, and OSAT engagement.

Nice to have

  • Experience with AI, networking, PCIe, CXL, or other high-speed data center interfaces.
  • Familiarity with JEDEC, IPC, thermal cycling, HTOL, and other package reliability and qualification standards.
  • Experience with chiplet-based architectures and heterogeneous integration.
  • Technical leadership or package ownership on high-volume products.

Culture & Benefits

  • Opportunity to help establish a strategic R&D center in Israel.
  • Work on connectivity silicon for large-scale AI and cloud environments.
  • Inclusive environment encouraging applications from people with diverse backgrounds and experiences.

Π‘ΡƒΠ΄ΡŒΡ‚Π΅ остороТны: Ссли Ρ€Π°Π±ΠΎΡ‚ΠΎΠ΄Π°Ρ‚Π΅Π»ΡŒ просит Π²ΠΎΠΉΡ‚ΠΈ Π² ΠΈΡ… систСму, ΠΈΡΠΏΠΎΠ»ΡŒΠ·ΡƒΡ iCloud/Google, ΠΏΡ€ΠΈΡΠ»Π°Ρ‚ΡŒ ΠΊΠΎΠ΄/ΠΏΠ°Ρ€ΠΎΠ»ΡŒ, Π·Π°ΠΏΡƒΡΡ‚ΠΈΡ‚ΡŒ ΠΊΠΎΠ΄/ПО, Π½Π΅ Π΄Π΅Π»Π°ΠΉΡ‚Π΅ этого - это мошСнники. ΠžΠ±ΡΠ·Π°Ρ‚Π΅Π»ΡŒΠ½ΠΎ ΠΆΠΌΠΈΡ‚Π΅ "ΠŸΠΎΠΆΠ°Π»ΠΎΠ²Π°Ρ‚ΡŒΡΡ" ΠΈΠ»ΠΈ ΠΏΠΈΡˆΠΈΡ‚Π΅ Π² ΠΏΠΎΠ΄Π΄Π΅Ρ€ΠΆΠΊΡƒ. ΠŸΠΎΠ΄Ρ€ΠΎΠ±Π½Π΅Π΅ Π² Π³Π°ΠΉΠ΄Π΅ β†’