Director Post-Silicon Product Engineering (Semiconductor)

Location: San Jose, California, United States; onsite leadership role

Salary: $210,000–$275,000 USD annually, depending on experience, level, and business need. The role may also be eligible for discretionary bonuses, incentives, and benefits.

Company

hirify.global provides rack-scale AI infrastructure through semiconductor-based connectivity solutions integrating CXL, Ethernet, NVLink, PCIe, UALink, and the COSMOS software suite.

What you will do

• Build, mentor, and lead a product engineering organization responsible for connectivity products used in AI infrastructure.
• Own the post-silicon product lifecycle from characterization and qualification through production ramp and sustaining.
• Develop and optimize Advantest 93K ATE programs for wafer sort and final test, improving yield, test time, and quality.
• Define product- and package-level qualification programs and partner with OSATs to support high-volume manufacturing.
• Lead system-level debug across test hardware, test programs, DUT interactions, and digital and analog domains.
• Collaborate with design, validation, operations, customers, and field teams on performance, quality, reliability, and production requirements.

Requirements

• Bachelor’s degree in Electrical Engineering or Computer Engineering.
• 8+ years of post-silicon product development experience involving high-speed signals, plus 5+ years of managerial experience building and leading product engineering teams.
• Hands-on Advantest 93K experience, including ATE test program development for wafer sort and final test.
• Strong technical knowledge of high-speed SerDes protocols such as PCIe, Ethernet, and CXL, and/or DDR5/LPDDR5 memory interfaces.
• Experience with standards-based qualification, high-volume semiconductor production, data analysis, and statistical tools such as JMP or Spotfire.
• Digital and analog circuit-level understanding for device characterization and debug.

Nice to have

• Master’s degree in Electrical Engineering or Computer Engineering.
• Firmware development in C/C++ or scripting in Python.
• Experience with 5nm-and-below process nodes, OSAT partnerships, and fabless semiconductor operations.
• Experience working with silicon validation teams and shipping products to hyperscaler customers in a high-growth environment.

Culture & Benefits

• Work on connectivity technologies supporting next-generation rack-scale AI infrastructure.
• Collaborate with hyperscalers, ecosystem partners, design, validation, operations, and customer-facing teams.
• Work in an environment that values creativity, innovation, and diverse backgrounds and experiences.
• Potential eligibility for discretionary bonuses, incentives, and benefits.