Senior RTL Engineer

Location: Hybrid work in Fundão, Lisboa - Expo, or VNG - Cais Gaia, Portugal

Company

hirify.global Engineering provides R&D and engineering services, combining digital and software technology expertise across multiple industries.

What you will do

• Drive digital design activities from architecture definition through tape-out.
• Perform feasibility studies, requirements analysis, and interface specification for system architectures.
• Define microarchitectures and develop complex digital blocks and SoCs using Verilog, SystemVerilog, or VHDL.
• Execute RTL quality checks, including Lint, CDC, and Low Power verification.
• Develop timing constraints and support synthesis, Static Timing Analysis, timing closure, integration, and design bring-up.
• Collaborate with Verification, Synthesis, STA, Physical Design, and DFT teams while improving automation scripts, design flows, and engineering tools.

Requirements

• Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or a related field.
• 6+ years of experience in RTL, ASIC, SoC, or VLSI design.
• Strong knowledge of Verilog, SystemVerilog, and/or VHDL, plus experience with complex digital design and microarchitecture definition.
• Understanding of SoC design methodologies, integration, verification methodologies, synthesis flows, STA, Lint, CDC, and Low Power design.
• Familiarity with ARM, RISC-V, or x86 CPU architectures and instruction sets.
• Experience with Python, Perl, or C scripting and programming, along with strong communication and problem-solving skills.

Culture & Benefits

• Multicultural, inclusive, and multidisciplinary work environment.
• Supportive atmosphere focused on work-life balance.
• Career growth programs, training, and certifications in cutting-edge technologies.
• National and international engineering projects.
• Health and life insurance.
• Referral program with bonuses and access to office facilities.