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1 час назад

Sr/Staff Mixed-Signal Design & Verification Engineer

Тип работы
fulltime
Грейд
senior
Английский
b2
Страна
Spain/Portugal
Вакансия из списка Hirify.GlobalВакансия из Hirify Global, списка международных tech-компаний
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Описание вакансии

Текст:
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TL;DR
Sr/Staff Mixed-Signal Design & Verification Engineer (ASIC mixed-signal ICs): Leading the design, verification, modelling, integration, and validation of complex mixed-signal ICs for power management, signal management, and related applications with an accent on transistor-level design, behavioural modelling, and ASIC development flows. Focus on running advanced analog and mixed-mode simulations, defining analog-digital interfaces and constraints, supporting post-silicon validation, and coordinating multiple projects.

Location: Barcelona, Spain or Portugal

Company

hirify.global develops integrated power semiconductors and power delivery architectures for portable and non-portable markets.

What you will do

  • Lead mixed-signal design, verification, validation, and development for complex ASICs using industry-standard tools.
  • Define analog-digital interfaces and documentation, and develop behavioral models for analog blocks.
  • Define, develop, integrate, and verify analog and mixed-signal IP.
  • Run and debug analog, digital, and mixed-signal simulations, including Monte Carlo, noise, and stability analyses.
  • Support digital design with timing, input/output, and DFT constraints, as well as post-silicon validation and characterization.
  • Supervise multiple projects, mentor mixed-signal designers, and collaborate with analog, layout, digital design, verification, and physical design teams.

Requirements

  • Senior: BSEE with 7 years or MSEE with 5 years of ASIC mixed-signal design experience; Staff: BSEE with 12 years or MSEE with 8 years of experience.
  • Strong background in transistor-level and analog/mixed-signal circuit design, including device mismatch, noise, linearity, and other analog effects.
  • Solid understanding of the full ASIC development and silicon fabrication process, layout best practices, DFT, STA, and mixed-signal timing and input/output constraints.
  • Experience with Spectre or HSPICE, Cadence ADE-L and ADE-XL, Calibre or ICV for DRC/LVS, and Verilog-AMS mixed-mode simulations.
  • Verilog, SystemVerilog, and Verilog-A coding skills for behavioral modelling.
  • Independent work, leadership, project coordination, communication, and cross-functional collaboration skills.

Nice to have

  • Automotive and ASIL standards knowledge.
  • Power management industry or application experience.
  • Experience with I2C, I3C, SPI, USB, or PMBUS.
  • Experience with GitLab and Cliosoft SOS.
  • Valid disability certificate.

Culture & Benefits

  • Focus on creativity, sustainability, leading-edge products, and innovation.
  • Inclusive culture built around diversity, equity, teamwork, fairness, and tolerance.
  • Equal opportunity employment regardless of legally protected status.

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