5 ΡΠ°ΡΠΎΠ² Π½Π°Π·Π°Π΄
Mixed-Signal Design & Verification Engineer Lead (ASIC)
ΠΡΡΡ & Π‘ΠΎΠΏΡΠΎΠ²ΠΎΠ΄
ΠΠ»Ρ ΠΌΡΡΡΠ° Ρ ΡΡΠΎΠΉ Π²Π°ΠΊΠ°Π½ΡΠΈΠ΅ΠΉ Π½ΡΠΆΠ΅Π½ Plus
ΠΠΏΠΈΡΠ°Π½ΠΈΠ΅ Π²Π°ΠΊΠ°Π½ΡΠΈΠΈ
Π’Π΅ΠΊΡΡ:
TL;DR
Mixed-Signal Design & Verification Engineer Lead (ASIC): Leading the development of design and verification frameworks for complex digital and mixed-signal ICs with an accent on analog/mixed-signal design, behavioral modeling, and ASIC verification. Focus on supervising multiple projects, defining analog-digital interfaces, running complex simulations, and supporting post-silicon validation for power management and signal management products.
Location: Barcelona, Spain or Portugal
Company
develops integrated power semiconductors and systems power delivery architectures for portable and non-portable markets.
What you will do
- Lead, supervise, mentor, and train the Mixed-Signal Design team.
- Supervise multiple projects, ensuring quality metrics, deliverables, and schedules are met.
- Define and lead design and verification frameworks for complex digital and mixed-signal ICs.
- Perform analog and mixed-signal design, verification, validation, simulation, and debugging.
- Define analog-digital interfaces, develop behavioral models, and analyze architectural trade-offs.
- Collaborate with analog, layout, digital design, verification, and physical design engineers, including support for post-silicon validation.
Requirements
- BSEE with 12 years of ASIC mixed-signal design experience, or MSEE with 8 years of experience.
- Strong background in transistor-level and analog/mixed-signal circuit design, device mismatches, noise, linearity, layout, and the ASIC fabrication process.
- Experience with Spectre, HSPICE, Cadence ADE-L and ADE-XL, Monte Carlo and noise simulations, stability analysis, DRC, and LVS.
- Experience with Verilog-AMS mixed-mode simulations and Verilog, SystemVerilog, and Verilog-A behavioral modeling.
- Knowledge of DFT techniques including SCAN, LBIST, ABIST, and IDDQ, as well as STA and mixed-signal timing and I/O constraints.
- Strong leadership, communication, independent working, and cross-functional collaboration skills.
Nice to have
- Automotive and ASIL standards experience.
- Knowledge of power management applications and interfaces such as I2C, I3C, SPI, USB, and PMBUS.
- Experience with GitLab and Cliosoft SOS.
- Valid disability certificate.
Culture & Benefits
- Inclusive culture focused on diversity, equity, teamwork, fairness, and tolerance.
- Opportunity to work on leading-edge semiconductor products and innovation.
- Equal opportunity employment environment.
ΠΡΠ΄ΡΡΠ΅ ΠΎΡΡΠΎΡΠΎΠΆΠ½Ρ: Π΅ΡΠ»ΠΈ ΡΠ°Π±ΠΎΡΠΎΠ΄Π°ΡΠ΅Π»Ρ ΠΏΡΠΎΡΠΈΡ Π²ΠΎΠΉΡΠΈ Π² ΠΈΡ ΡΠΈΡΡΠ΅ΠΌΡ, ΠΈΡΠΏΠΎΠ»ΡΠ·ΡΡ iCloud/Google, ΠΏΡΠΈΡΠ»Π°ΡΡ ΠΊΠΎΠ΄/ΠΏΠ°ΡΠΎΠ»Ρ, Π·Π°ΠΏΡΡΡΠΈΡΡ ΠΊΠΎΠ΄/ΠΠ, Π½Π΅ Π΄Π΅Π»Π°ΠΉΡΠ΅ ΡΡΠΎΠ³ΠΎ - ΡΡΠΎ ΠΌΠΎΡΠ΅Π½Π½ΠΈΠΊΠΈ. ΠΠ±ΡΠ·Π°ΡΠ΅Π»ΡΠ½ΠΎ ΠΆΠΌΠΈΡΠ΅ "ΠΠΎΠΆΠ°Π»ΠΎΠ²Π°ΡΡΡΡ" ΠΈΠ»ΠΈ ΠΏΠΈΡΠΈΡΠ΅ Π² ΠΏΠΎΠ΄Π΄Π΅ΡΠΆΠΊΡ. ΠΠΎΠ΄ΡΠΎΠ±Π½Π΅Π΅ Π² Π³Π°ΠΉΠ΄Π΅ β
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