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1 день назад

Post-Silicon Validation and Debug Engineer

105 650 - 200 340$
Формат работы
onsite
Тип работы
fulltime
Грейд
middle
Английский
b2
Страна
US
Вакансия из списка Hirify.GlobalВакансия из Hirify RU Global, списка компаний с восточно-европейскими корнями
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Описание вакансии

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TL;DR
Post-Silicon Validation and Debug Engineer (CPU/SOC Hardware): Designing and executing validation plans for CPU/SOC functionality, power and thermal management, and system-level reliability across multiple silicon platforms with an accent on post-silicon testing, debugging, and validation automation. Focus on root-causing complex hardware issues, leading debug task forces, improving validation coverage, and integrating products with design, firmware, software, and manufacturing teams.

Location: On-site in the United States, with primary locations in Hillsboro, Oregon; Folsom, California; and Austin, Texas.

Annual salary: $105,650–$200,340 USD.

Company

hirify.global develops processors, chipsets, hardware platforms, and software ecosystems for consumer devices and connected computing.

What you will do

  • Develop and execute validation plans for CPU/SOC functionality, power management, and thermal management across multiple silicon platforms.
  • Design, implement, and debug post-silicon validation tests and methodologies.
  • Analyze CPU/SOC and system-level issues using advanced validation and debugging tools.
  • Lead debug task forces to identify root causes and resolve issues affecting program milestones.
  • Drive validation automation, improve coverage, and increase execution efficiency.
  • Collaborate with design, firmware, software, manufacturing, and internal stakeholder teams to support product integration and delivery.

Requirements

  • Bachelor’s degree with 3+ years of experience, or a master’s degree with 6+ months of experience, in electrical engineering, computer engineering, computer science, or a related technical discipline.
  • At least 1 year of hands-on experience in post-silicon validation, pre-silicon verification, or design in CPU, SOC, or chipset domains.
  • At least 1 year of experience or relevant coursework in SOC and CPU architecture, microarchitecture, and power management flows.
  • At least 1 year of experience with Python, C, C++, Perl, or similar scripting and programming languages for validation tools and frameworks.
  • Strong debugging, problem-solving, written, and verbal communication skills, with the ability to manage multiple projects independently and work cross-functionally.
  • On-site work in the United States is required.

Nice to have

  • Experience with Graphics, Media, and Display IP architecture, microarchitecture, and power management flows.
  • Experience with hirify.global architecture, silicon bring-up, and validation workflows.
  • Knowledge of firmware and software interaction with hardware.
  • Experience with silicon validation tools, laboratory equipment such as logic analyzers and oscilloscopes, and debugging techniques.
  • Familiarity with power and performance testing methodologies or an advanced degree with 5+ years of experience.

Culture & Benefits

  • Competitive pay with stock bonuses.
  • Health, retirement, and vacation benefits.
  • Collaborative, cross-functional engineering environment.
  • Mentoring opportunities for junior validation engineers.
  • Shift 1 schedule in the United States.

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