Principal Design Verification Engineer (AI)

Location: San Jose, California, United States

Salary: $180,000–$255,000 USD base salary

Company

hirify.global develops a full-stack generative AI platform combining the SN40L chip, machine learning models, and cloud or on-premises deployment.

What you will do

• Own end-to-end design verification for a major subsystem of the reconfigurable dataflow processor, including test planning, testbench architecture, coverage models, and sign-off criteria.
• Develop testbench components, agents, checkers, and stimulus for block, full-chip, system, and gate-level verification.
• Drive coverage closure, regression health, failure triage, and root-cause analysis for complex and intermittent failures.
• Verify functional and performance behavior against production machine learning workloads.
• Advance reusable verification infrastructure, integrate verification IP, and develop AI-assisted verification workflows.
• Contribute to emulation, FPGA prototyping, silicon bring-up, post-silicon debug, technical reviews, and engineer mentorship.

Requirements

• BS or MS in electrical engineering, computer science, or computer engineering, with 7+ years of industry experience in ASIC design verification or equivalent experience.
• Hands-on expertise in SystemVerilog, SVA, and a standard verification methodology such as UVM, OVM, or VMM, plus Python and C/C++ scripting.
• Full-cycle verification ownership from test planning through tape-out on a complex ASIC or major subsystem, including coverage closure.
• Experience verifying digital logic in a CPU, GPU, SoC, or comparably complex ASIC.
• Ability to debug difficult pre-silicon failures to root cause and provide technical leadership through reviews, decision-making, and mentoring.
• Working knowledge of computer architecture and machine learning accelerators or SoCs.

Nice to have

• MS or PhD with 10+ years of ASIC design verification experience.
• High-speed I/O and memory verification, including PCIe, Ethernet, HBM, or DDR.
• Performance verification, formal verification, assertion-based methods, gate-level simulation, and third-party verification IP.
• Emulation, FPGA prototyping, post-silicon lab bring-up, and first-silicon debugging.
• Experience applying Claude or other AI tools to verification and flow development.

Culture & Benefits

• Full-time US employment with base salary, equity, and benefits.
• Medical insurance with 95% employee premium coverage and 77% dependent premium coverage.
• Dental, vision, disability, life, AD&D, HSA, and FSA options.
• Well-being benefits including Headspace, Gympass+, One Medical, and counseling services.
• Equal opportunity employment with consideration for legally protected statuses.