4 дня назад
Principal Design Verification Engineer (SystemVerilog/UVM)
160 400 - 237 320$
Мэтч & Сопровод
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Описание вакансии
Текст:
TL;DR
Principal Design Verification Engineer (SystemVerilog/UVM): Verifying AI/ML, networking, compute, automotive, and baseband SoCs and IPs with an accent on functional verification environments, test planning, coverage analysis, and failure debug. Focus on architecting multicore SoC verification tools, developing constrained-random tests and UVM components, and closing code and functional coverage with design teams.
Location: Morrisville, North Carolina, United States
Salary: $160,400–$237,320 per annum
Company
develops semiconductor solutions and infrastructure processors for enterprise, cloud, AI, carrier, telecom, and automotive applications.
What you will do
- Verify AI/ML, networking, compute, automotive, and baseband SoCs and IPs.
- Architect functional verification environments with reference models, bus-functional monitors, and drivers using SystemVerilog and UVM.
- Create detailed verification test plans and develop constrained-random tests with coverage analysis.
- Tune verification environments to achieve code and functional coverage goals.
- Debug failures and collaborate with designers to resolve issues.
- Architect, develop, and maintain tools for state-of-the-art multicore SoC design verification.
Requirements
- 10–15 years of related professional experience with a bachelor’s degree, or 5–10 years with a master’s degree and/or PhD, in Computer Science, Electrical Engineering, or a related field.
- Strong experience developing complex, constrained-random verification environments with SystemVerilog and UVM.
- Strong experience writing and executing detailed verification test plans.
- Experience with Python or Perl, EDA verification tools, bug tracking, and regression mechanisms.
- Strong object-oriented design and implementation experience.
- Ability to analyze data, solve problems, manage multiple tasks, and independently deliver work aligned with project goals.
Nice to have
- Verification experience with ARM or processor, memory, networking, NoC, and cache subsystems.
- Experience with AMBA, PCIe, Ethernet, I2C, SPI, or UART protocols.
- Working knowledge of C/C++ for ARM and processor modeling or code development.
- Experience with post-silicon validation and debug or gate-level simulations.
- Strong communication, analysis, problem-solving, accountability, and collaboration skills.
Culture & Benefits
- Employee stock purchase plan with a two-year lookback.
- Family support programs for balancing work and home life.
- Mental and physical health resources.
- Recognition and service awards.
- Reasonable accommodation is available during the selection process.
Hiring process
- Interviews evaluate individual experience, thought process, and communication skills in real time.
- Use of AI tools, transcription apps, answer generators, or automated note-taking bots is prohibited during interviews.
- Access to export-controlled technology may require an export license review before employment.
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