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21 час назад

Analog Design Engineer

122 440 - 172 860$
Формат работы
onsite
Тип работы
fulltime
Грейд
middle
Английский
b2
Страна
US
Вакансия из списка Hirify.GlobalВакансия из Hirify RU Global, списка компаний с восточно-европейскими корнями
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Описание вакансии

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TL;DR
Analog Design Engineer (Analog/Mixed-Signal ICs): Designing and validating analog circuits for high-speed serial I/O and die-to-die interfaces across advanced process nodes with an accent on transistor-level design, SPICE simulation, and power, signal, and leakage optimization. Focus on developing test plans, debugging circuit behavior, collaborating on layout, and optimizing performance, power, and area.

Location: On-site in Phoenix, Arizona, United States, with an additional location in Hillsboro, Oregon; office presence required at least 4 days per week.

Salary: $122,440–$172,860 USD annually for US-based roles.

Company

hirify.global develops semiconductor technologies and analog and mixed-signal hirify.globallectual property for client, datacenter, AI, and foundry customers.

What you will do

  • Design and develop analog circuits for analog and mixed-signal IPs on advanced process nodes.
  • Analyze circuits using SPICE simulation tools including Cadence, Synopsys, and LTSpice.
  • Develop test plans and validate designs against circuit and block microarchitecture specifications.
  • Collaborate with layout engineers to optimize circuit performance and support layout activities.
  • Simulate and debug circuits to improve power integrity, signal integrity, leakage, power, and performance.
  • Participate in design reviews, technical documentation, cross-functional collaboration, and progress reporting.

Requirements

  • Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field with 3+ years of circuit design experience, or a master's degree with 2+ years of experience.
  • Experience with circuit simulation tools and analog behavior modeling.
  • Knowledge of signal integrity, power integrity, analog layout considerations, and analog circuit fundamentals.
  • Knowledge of TX/RX blocks, I/O fundamentals, noise, linearity, matching, and stability.
  • Experience with Cadence analog IC design tools.
  • Strong analytical, problem-solving, communication, and transistor-level design trade-off skills.

Nice to have

  • IP top-level design experience including floor planning, power delivery, ESD, bump maps, top-level simulations, and signal integrity.
  • Experience with analog IC and mixed-signal design.
  • Experience integrating performance, power, and area optimization into circuit designs.
  • Scripting experience with Python or MATLAB.
  • Knowledge of statistical analysis and design for manufacturability.

Culture & Benefits

  • Collaborative environment with cross-functional work across architecture, logic design, validation, and SoC teams.
  • Health, retirement, and vacation benefits.
  • Competitive pay and stock bonuses.
  • On-site work model with Shift 1 United States of America.

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