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4 дня назад

CPU Circuit Memory Design Engineer (VLSI)

220 920 - 311 890$
Формат работы
hybrid
Тип работы
fulltime
Грейд
senior
Английский
b2
Страна
US
Вакансия из списка Hirify.GlobalВакансия из Hirify RU Global, списка компаний с восточно-европейскими корнями
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Текст:
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TL;DR
CPU Circuit Memory Design Engineer (VLSI): Designing and developing full-custom and compiler-based SRAMs, register files, ROMs, custom memories, digital circuits, and caches for next-generation Intel CPUs and SoCs with an accent on high-performance, high-density, and low-power embedded memory designs. Focus on memory circuit simulations, cache critical-path analysis, bit-cell and periphery IC design, and power, performance, and area optimization.

Location: Austin, Texas, United States; hybrid work model with time split between the assigned hirify.global site and off-site work.

Annual salary: $220,920–$311,890 USD

Company

hirify.global develops semiconductor technologies and CPU and SoC products.

What you will do

  • Design, develop, and build full-custom and compiler-based SRAMs, large signal arrays, ROMs, custom memories, digital circuits, and caches.
  • Perform memory circuit design, technical readiness activities, characterization, and simulations.
  • Design caches and custom blocks that meet stringent power, performance, and area constraints.
  • Develop memory bit-cells, complex peripheral ICs, memory arrays, and IP while automating design workflows.
  • Drive memory path-finding, circuit innovation, and power, performance, and area optimization for advanced CMOS processes.
  • Define methodologies and execute project schedules in collaboration with technology domain experts.

Requirements

  • Bachelor's degree in Electrical Engineering, Computer Engineering, or a STEM-related field with 6+ years of experience; or a Master's degree with 5+ years; or a PhD with 2+ years.
  • Proficiency in CMOS circuit design, digital logic optimization, and power, performance, and area trade-offs.
  • Expertise in VLSI circuits and design methodologies.
  • Experience with low-power implementation techniques and memory design.
  • Ability to analyze circuit and layout trade-offs and solve complex technical problems.
  • Ability to work under the hybrid model at the assigned hirify.global site in the United States.

Nice to have

  • Knowledge of EBB design tools, flows, and methodologies.
  • Experience with signal integrity analysis.

Culture & Benefits

  • Fast-paced environment focused on high-performance, low-power CPU design and circuit innovation.
  • Collaboration with domain experts across technology development.
  • Competitive pay, stock bonuses, health benefits, retirement benefits, and vacation.
  • Position of Trust requiring consent to and successful completion of an extended background investigation.

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