SRAM/ROM Circuit Design Engineer

Location: Austin, Texas, United States; hybrid work with at least 3 days per week in the office

Company

Provides SRAM and ROM memory compiler solutions as part of a semiconductor design enablement and foundation IP organization supporting SoC design teams across multiple business lines.

What you will do

• Design CMOS SRAM and ROM memory circuits that meet performance, power, and area requirements.
• Develop periphery circuits supporting functional safety and scan functionality.
• Generate, execute, and evaluate simulation characterization measurements and test benches against performance targets.
• Collaborate with layout teams to implement compiler leaf cells and improve area and performance.
• Work with CAD, modeling, and verification teams to integrate designs into characterization, verification, regression, frontend modeling, ATPG, and emulation flows.
• Collaborate across global memory teams and use internally supported LLM/GenAI and EDA vendor GenAI tools to improve design methodologies.

Requirements

• Bachelor’s degree in Electrical Engineering, Computer Engineering, or a related discipline.
• 8+ years of industry experience in SRAM memory circuit design, or 6+ years with a master’s degree.
• Experience designing with advanced CMOS foundry technologies at 5nm and beyond.
• Strong familiarity with Cadence Virtuoso and other industry-standard EDA tools.
• Proficiency in scripting languages such as Perl, Tcl, or Python.
• Creative mindset with strong analytical and problem-solving skills.

Nice to have

• Master’s degree in Electrical Engineering, Computer Engineering, or a related discipline.
• Familiarity with automotive design rules and memory design requirements.

Culture & Benefits

• Work on memory compiler solutions used by SoC design teams across multiple business lines.
• Collaborate with global memory, layout, CAD, modeling, and verification teams.
• Regular in-office collaboration is expected at the Austin, Texas location.