Вакансия из Hirify Global, списка международных tech-компаний Для мэтча и отклика нужен Plus
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Зарплата и рынок
Мало
$110к-176к/год
$140к$160кмедиана$190к
По похожим ролям (50) ~ $160к/год
На СНГ рынке: $1.9к/мес ($1.8к - $3к)
68
Средняя вакансия
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Это влиятельная роль в глобальном гиганте полупроводников с очень четким кругом задач, но базовая зарплата значительно ниже рыночного медианного значения для инженеров уровня Staff.
Staff Memory Circuit Design Engineer (Memory Compilers/Custom Macros): Developing memory compilers and custom memory macros for advanced process technologies with an accent on transistor-level circuit design, physical implementation, and characterization. Focus on analyzing memory architectures, automating simulation and verification flows, correlating silicon with simulation data, and debugging silicon issues.
Location: Mendota Heights, United States; onsite
Annual base salary: USD 109,700–175,500
Company
hirify.global develops semiconductor technologies, including memory compilers and custom memory macros through its Central Engineering Group.
What you will do
Analyze memory architectures and evaluate design tradeoffs.
Design and build memory and circuit blocks at gate and transistor level, then simulate and analyze them.
Extract layouts, perform post-layout simulations and verification, and integrate floorplans, physical implementation, and leafcell layouts into physical macros.
Integrate characterization flows to extract timing and power data, and develop scripts to automate characterization, simulation, and verification.
Specify and verify behavioral and physical memory models, document design specifications and timing diagrams, and define silicon test plans.
Correlate silicon results with simulation data and help debug silicon issues.
Requirements
BS degree in Electrical Engineering and 8+ years of related experience.
Strong knowledge of memory compiler or custom digital circuit development, including SRAMs, register files, multi-ports, and ROMs.
Deep understanding of transistor-level circuit behavior and device physics.
Good understanding of signal integrity, EM/IR, and reliability analysis.
Understanding of memory behavioral and physical models, DFT schemes, and chip-level integration.
Proficiency in running simulators, writing automation scripts, and using design tools.
Good communication, interpersonal, leadership, multitasking, and self-management skills.
Nice to have
Experience with test setups, silicon testing, and silicon debug.
Proficiency in Python programming.
Culture & Benefits
Full-time onsite position with the Central Engineering Group.
Eligibility for a discretionary annual bonus and new-hire and annual equity awards, subject to applicable plans and agreements.
Medical, dental, and vision plans.
401(k) participation with company matching, ESPP, EAP, paid holidays, paid sick leave, vacation time, and applicable paid family and other leave.
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