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4 часа Π½Π°Π·Π°Π΄

Staff Analog Mixed-Signal Design - Optical

126Β 700 - 187Β 480$
Π’ΠΈΠΏ Ρ€Π°Π±ΠΎΡ‚Ρ‹
fulltime
Π“Ρ€Π΅ΠΉΠ΄
senior
Английский
b2
Π‘Ρ‚Ρ€Π°Π½Π°
US
Вакансия ΠΈΠ· списка Hirify.GlobalВакансия ΠΈΠ· Hirify Global, списка ΠΌΠ΅ΠΆΠ΄ΡƒΠ½Π°Ρ€ΠΎΠ΄Π½Ρ‹Ρ… tech-ΠΊΠΎΠΌΠΏΠ°Π½ΠΈΠΉ
Для мэтча ΠΈ ΠΎΡ‚ΠΊΠ»ΠΈΠΊΠ° Π½ΡƒΠΆΠ΅Π½ Plus

ΠœΡΡ‚Ρ‡ & Π‘ΠΎΠΏΡ€ΠΎΠ²ΠΎΠ΄

Для мэтча с этой вакансиСй Π½ΡƒΠΆΠ΅Π½ Plus

ОписаниС вакансии

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TL;DR
Staff Analog Mixed-Signal Design - Optical (RF/Analog ICs): Designing and validating multi-tens-of-GHz transimpedance amplifiers and broadband analog circuits for optical front-end receivers with an accent on SiGe BiCMOS, CMOS FinFET, and millimeter-wave structures. Focus on transistor-level design, transmission-line development, post-silicon measurement correlation, and transitioning high-speed optical ICs to production.

Location: Westlake Village, California, United States

Salary: $126,700–$187,480 per annum

Company

hirify.global develops semiconductor solutions for enterprise, cloud and AI, carrier, data center, and telecom infrastructure.

What you will do

  • Design and validate high-speed FET and BiCMOS circuits for optical fiber communication ICs.
  • Develop multi-tens-of-GHz transimpedance amplifiers and broadband analog circuits for optical front-end receivers.
  • Design transmission-line and millimeter-wave structures, linear regulators, AGC loops, sensors, and bandgap circuits.
  • Measure IC performance, debug designs, and correlate simulations with laboratory results.
  • Collaborate on post-silicon validation, qualification, mass production transition, and customer support.

Requirements

  • Bachelor’s degree in Electrical Engineering with 3–5 years of industry experience, or a Master’s or PhD with at least 1 year of relevant experience.
  • Experience designing high-performance RF/analog receivers or TIAs, including chip tape-out and laboratory evaluation.
  • Proficiency with EDA CAD tools and analog custom layout.
  • Strong knowledge of transistor-level design, device physics, and control or feedback loop stability analysis.
  • Experience measuring IC performance and debugging designs against simulations.
  • Applicants must be eligible to access technology and software subject to U.S. export control laws; an export license review may be required.

Nice to have

  • Experience with SiGe BiCMOS, FinFET CMOS, package-system integration, AGC loops, equalizers, precision analog circuits, DACs, or ADCs.
  • Experience mentoring junior designers, serving as a chip lead, taking chips to mass production, or translating specifications into architecture.
  • Strong communication, presentation, and documentation skills.

Culture & Benefits

  • Employee stock purchase plan with a two-year lookback.
  • Family support programs and mental health resources.
  • Financial well-being, physical health, recognition, and service award programs.
  • Equal employment opportunity and reasonable accommodation support during the selection process.

Hiring process

  • Interviews evaluate individual experience, problem-solving, and communication skills.
  • AI tools, transcription applications, and automated interview assistance are not permitted unless authorized by the interviewer.

Π‘ΡƒΠ΄ΡŒΡ‚Π΅ остороТны: Ссли Ρ€Π°Π±ΠΎΡ‚ΠΎΠ΄Π°Ρ‚Π΅Π»ΡŒ просит Π²ΠΎΠΉΡ‚ΠΈ Π² ΠΈΡ… систСму, ΠΈΡΠΏΠΎΠ»ΡŒΠ·ΡƒΡ iCloud/Google, ΠΏΡ€ΠΈΡΠ»Π°Ρ‚ΡŒ ΠΊΠΎΠ΄/ΠΏΠ°Ρ€ΠΎΠ»ΡŒ, Π·Π°ΠΏΡƒΡΡ‚ΠΈΡ‚ΡŒ ΠΊΠΎΠ΄/ПО, Π½Π΅ Π΄Π΅Π»Π°ΠΉΡ‚Π΅ этого - это мошСнники. ΠžΠ±ΡΠ·Π°Ρ‚Π΅Π»ΡŒΠ½ΠΎ ΠΆΠΌΠΈΡ‚Π΅ "ΠŸΠΎΠΆΠ°Π»ΠΎΠ²Π°Ρ‚ΡŒΡΡ" ΠΈΠ»ΠΈ ΠΏΠΈΡˆΠΈΡ‚Π΅ Π² ΠΏΠΎΠ΄Π΄Π΅Ρ€ΠΆΠΊΡƒ. ΠŸΠΎΠ΄Ρ€ΠΎΠ±Π½Π΅Π΅ Π² Π³Π°ΠΉΠ΄Π΅ β†’