обновлено 9 часов назад
CPU Pre-Silicon Verification Engineer
141 910 - 269 100$
Вакансия из Hirify Global, списка международных tech-компанийДля мэтча и отклика нужен Plus
Мэтч & Сопровод
Для мэтча с этой вакансией нужен Plus
Описание вакансии
Текст:
TL;DR
CPU Pre-Silicon Verification Engineer (CPU Architecture/ASIC Validation): Developing and executing validation strategies for next-generation Intel CPU core designs with an accent on microarchitecture behavior, coverage-driven validation, and system-level feature interactions. Focus on building validation infrastructure, debugging functional issues, analyzing root causes, and ensuring silicon readiness before manufacturing.
Location: On-site in Folsom, California, United States
Annual salary: $141,910–$269,100 USD
Company
develops CPU architectures and computing technologies for client, AI, cloud computing, and high-performance computing products.
What you will do
- Define, develop, and execute pre-silicon validation plans for CPU core designs.
- Validate CPU functionality, microarchitecture behavior, and system-level feature interactions across simulation, emulation, and FPGA environments.
- Develop test scenarios, coverage models, automation frameworks, checkers, monitors, and validation tools.
- Review architecture and design changes to assess validation impacts, risks, schedules, and test requirements.
- Debug functional issues, perform root-cause analysis, triage failures, and publish validation findings.
- Collaborate with architecture, RTL design, verification, post-silicon, and platform engineering teams to support silicon readiness.
Requirements
- Bachelor’s degree in Electrical Engineering, Computer Engineering, Computer Science, or a related science or engineering field with 5+ years of pre-silicon verification or front-end experience; or a master’s degree with 3+ years of relevant experience.
- Experience with programming languages such as C, C++, C#, Visual Basic/.NET, Perl, Python, or Java.
- Experience with SystemVerilog, Verilog, VHDL, verification, validation, and VCS or a similar simulator.
- Experience translating architecture and design specifications into validation objectives, test scenarios, coverage models, execution strategies, and sign-off criteria.
- Ability to work on-site in Folsom, California, United States.
Nice to have
- Experience with computer architecture, microarchitecture, and coverage-driven validation.
- Experience in IP or SoC ASIC validation.
- Experience with Specman E and/or OVM/UVM.
- Knowledge of x86 core architecture and instruction sets.
Culture & Benefits
- Collaborative work with architects, RTL designers, verification engineers, post-silicon engineers, and platform teams.
- Competitive compensation with stock bonuses.
- Health, retirement, and vacation benefits.
- Opportunity to contribute to CPU products used by customers worldwide.
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