14 ΡΠ°ΡΠΎΠ² Π½Π°Π·Π°Π΄
Field Application Engineer Intern (Hardware)
ΠΡΡΡ & Π‘ΠΎΠΏΡΠΎΠ²ΠΎΠ΄
ΠΠ»Ρ ΠΌΡΡΡΠ° Ρ ΡΡΠΎΠΉ Π²Π°ΠΊΠ°Π½ΡΠΈΠ΅ΠΉ Π½ΡΠΆΠ΅Π½ Plus
ΠΠΏΠΈΡΠ°Π½ΠΈΠ΅ Π²Π°ΠΊΠ°Π½ΡΠΈΠΈ
Π’Π΅ΠΊΡΡ:
TL;DR
Field Application Engineer Intern (Hardware) (PAM4/Optical Technologies): Supporting customer hardware and software debugging, optical module optimization, and product bring-up in Marvellβs Shanghai, Suzhou, or Wuhan offices with an accent on PAM4 DSP, Coherent DSP, TIA, driver chips, and optical communication systems. Focus on reviewing customer schematics and layouts, supporting SI/PI simulations, tuning lab performance, and debugging high-speed SerDes products.
Location: Shanghai, Suzhou, or Wuhan; internship conducted onsite at offices
Company
develops semiconductor solutions for enterprise, cloud, AI, carrier, and optical data infrastructure.
What you will do
- Assist senior field application engineers with customer schematic and layout reviews for PAM4 DSP, Coherent DSP, driver, and TIA designs.
- Support signal integrity and power integrity simulations for optical modules, AEC, NPO, XPO, and CPO products.
- Participate in product bring-up, evaluation, performance testing, and hardware/software debugging in the lab.
- Help tune and optimize customer products under the guidance of experienced engineers.
- Support customer engagements by investigating issues in customer systems.
- Create and maintain technical documentation, FAQs, and internal training materials.
Requirements
- Pursuing a Masterβs or Ph.D. degree in integrated circuit design, integrated systems, electronic information engineering, or a related field.
- Fundamental understanding or research experience in high-speed analog and mixed-signal SerDes, PAM4, analog TIA, driver chip design, or optical communication systems.
- Strong willingness to learn, effective communication skills, and a collaborative mindset.
- Available for an onsite internship in Shanghai, Suzhou, or Wuhan for at least 4β6 months.
Culture & Benefits
- Hands-on experience with PAM4 and Coherent optical DSP technologies.
- Practical exposure to system-level bring-up and hardware/software co-debugging.
- Mentorship from experienced FAEs and U.S. engineering teams.
- Opportunity to learn about SerDes DSPs using 5nm, 3nm, and 2nm process nodes for 112G, 224G, and 448G applications.
- Competitive compensation and benefits in a collaborative, transparent, and inclusive work environment.
- Successful interns may receive a full-time offer after completing the internship and passing an assessment.
Hiring process
- Interview participation must be unaided by AI tools, transcription apps, automated note-taking bots, or real-time answer generators.
- Applicants may undergo an export license review before employment because the role may involve access to U.S. export-controlled technology or software.
ΠΡΠ΄ΡΡΠ΅ ΠΎΡΡΠΎΡΠΎΠΆΠ½Ρ: Π΅ΡΠ»ΠΈ ΡΠ°Π±ΠΎΡΠΎΠ΄Π°ΡΠ΅Π»Ρ ΠΏΡΠΎΡΠΈΡ Π²ΠΎΠΉΡΠΈ Π² ΠΈΡ ΡΠΈΡΡΠ΅ΠΌΡ, ΠΈΡΠΏΠΎΠ»ΡΠ·ΡΡ iCloud/Google, ΠΏΡΠΈΡΠ»Π°ΡΡ ΠΊΠΎΠ΄/ΠΏΠ°ΡΠΎΠ»Ρ, Π·Π°ΠΏΡΡΡΠΈΡΡ ΠΊΠΎΠ΄/ΠΠ, Π½Π΅ Π΄Π΅Π»Π°ΠΉΡΠ΅ ΡΡΠΎΠ³ΠΎ - ΡΡΠΎ ΠΌΠΎΡΠ΅Π½Π½ΠΈΠΊΠΈ. ΠΠ±ΡΠ·Π°ΡΠ΅Π»ΡΠ½ΠΎ ΠΆΠΌΠΈΡΠ΅ "ΠΠΎΠΆΠ°Π»ΠΎΠ²Π°ΡΡΡΡ" ΠΈΠ»ΠΈ ΠΏΠΈΡΠΈΡΠ΅ Π² ΠΏΠΎΠ΄Π΄Π΅ΡΠΆΠΊΡ. ΠΠΎΠ΄ΡΠΎΠ±Π½Π΅Π΅ Π² Π³Π°ΠΉΠ΄Π΅ β
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