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13 часов назад

Senior Digital Design Engineer (PMIC)

Формат работы
onsite
Тип работы
fulltime
Грейд
senior
Английский
b2
Страна
US
Вакансия из списка Hirify.GlobalВакансия из Hirify Global, списка международных tech-компаний
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Описание вакансии

Текст:
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TL;DR
Senior Digital Design Engineer (PMIC): Leading the architecture, RTL design, verification, and implementation of next-generation Power Management ICs for automotive and industrial applications with an accent on mixed-signal control, low-power design, and silicon validation. Focus on developing digital control, telemetry, diagnostics, protection, and fault-management functions, closing timing, driving formal and coverage-based verification, and supporting production release.

Location: Chandler, Arizona, USA; office-based

Company

hirify.global develops secure connectivity and embedded solutions for automotive, industrial, IoT, mobile, and communication infrastructure markets.

What you will do

  • Lead digital architecture, RTL development, integration, synthesis, timing closure, low-power implementation, silicon bring-up, and production release for PMIC products.
  • Design digital control, monitoring, telemetry, diagnostics, configuration, protection, power sequencing, and fault-management functions.
  • Define microarchitecture, interfaces, implementation plans, and requirements traceability for mixed-signal PMICs.
  • Drive verification strategy using simulation, formal verification, assertions, coverage analysis, and regression management.
  • Support silicon debug, characterization, qualification, reliability validation, and production ramp activities.
  • Mentor junior engineers and improve design methodologies, automation flows, and engineering practices.

Requirements

  • M.S. in Electrical Engineering, Computer Engineering, or a related field.
  • At least 10 years of digital IC design and development experience, including architecture and technical leadership.
  • Expertise in Verilog/SystemVerilog RTL design for complex digital and mixed-signal ICs.
  • Knowledge of finite state machines, clock-domain crossing, reset architecture, low-power design, synthesis, static timing analysis, equivalence checking, DFT, and physical implementation.
  • Experience with UVM, assertions, formal verification, coverage-driven verification, and industry-standard EDA tools from Cadence, Synopsys, and Siemens EDA.
  • Strong analytical, problem-solving, communication, and cross-functional leadership skills.

Nice to have

  • Experience developing digital controllers for PMICs, power management systems, automotive electronics, or industrial applications.

Culture & Benefits

  • Online and offline learning opportunities support technical and professional development.
  • Inclusive work environment with programs focused on diversity, inclusion, and equality.
  • Commitment to sustainability and measurable progress toward a more sustainable future.

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