Principal IC Digital Design (SoC Design)

TL;DR

Principal IC Digital Design (SoC Design): Leading micro-architecture and RTL development for advanced SoC products used in AI, cloud data centers, and telecom with an accent on high-performance digital logic and low-power techniques. Focus on owning major IP blocks, ensuring silicon readiness, and solving complex timing and power integration issues.

Location: Santa Clara, CA

Salary: $158,600 - $237,600 per annum

Company

hirify.global develops semiconductor solutions that serve as essential building blocks for data infrastructure across enterprise, cloud, and AI.

What you will do

• Own RTL design, implementation, and integration of complex blocks or subsystems.
• Define and influence block-level and subsystem-level micro-architecture.
• Develop high-quality, synthesizable RTL using Verilog and SystemVerilog.
• Collaborate with verification, validation, firmware, and physical design teams.
• Identify and resolve complex functional, timing, power, and integration issues.
• Mentor junior engineers and contribute to digital design methodologies.

Requirements

• Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or related field.
• 12+ years of experience in digital IC or SoC RTL design.
• Deep expertise in RTL using SystemVerilog and micro-architecture.
• Strong understanding of clocking, reset, power-aware design, and SoC architecture.
• Hands-on experience with lint, CDC, and RDC analysis.
• Experience with ARM AMBA, PCIE, DDR, LPDDR, I2C/SMBus, I3C, USB, UART, QSPI/SPI.

Nice to have

• Experience with large-scale SoC integration.
• Familiarity with low-power design techniques.
• Exposure to synthesis, STA, or physical design flows.
• Experience mentoring engineers or leading technical reviews.

Culture & Benefits

• Employee stock purchase plan with a 2-year look back.
• Comprehensive financial well-being and family support programs.
• Robust mental health and physical health resources.
• Recognition and service awards to celebrate milestones.