Senior Frontend Design Engineer (AI Chips)

Location: On-site in Sunnyvale, California, United States

Salary: $250,000–$300,000 annually, plus potential bonus and equity

Company

hirify.global Systems develops wafer-scale AI processors and high-speed AI computing systems for model labs, enterprises, and AI-native startups.

What you will do

• Drive chip design from functional specification and micro-architecture through RTL development and synthesis.
• Integrate front-end chip designs and third-party IP.
• Collaborate with physical design teams to achieve design closure and PPA goals.
• Work with design verification and DFT teams to improve functional and test coverage.
• Partner with software and systems teams to optimize product performance and features.
• Debug functional, timing, and power issues during silicon bring-up.

Requirements

• Master’s degree in Computer Science, Electrical Engineering, or an equivalent field.
• 8+ years of experience delivering complex, high-performance RTL designs.
• Multiple successful silicon tapeouts or production silicon successes.
• Experience in networking, high-performance computing, machine learning, or a related field.
• Experience with TCP/IP, RDMA, Ethernet, PCIe, CPU interfaces, and SerDes technology.
• Working knowledge of Python and TCL scripting tools, plus experience collaborating with external vendors.

Nice to have

• Experience with FPGA development toolchains, including place and route, floorplanning, and timing analysis.
• Experience managing an external ASIC vendor through the product development cycle.

Culture & Benefits

• Build an AI platform designed to overcome GPU limitations.
• Work on one of the world’s fastest AI supercomputers.
• Opportunities to publish and open-source AI research.
• Startup vitality combined with job stability.
• Non-corporate culture focused on individual beliefs, inclusion, learning, growth, and support.