Lead Frontend Design Engineer (AI Chips)

Location: Headquarters/Sunnyvale Office, United States; on-site

Salary: $175,000–$275,000 annually, plus potential bonus and equity.

Company

hirify.global Systems develops wafer-scale AI processors and high-speed computing systems for AI model training and inference.

What you will do

• Drive chip design from functional specification and micro-architecture through RTL development and synthesis.
• Manage an external ASIC vendor throughout the product development cycle.
• Collaborate with physical design teams to achieve power, performance, and area goals.
• Work with design verification and DFT teams to maximize functional and test coverage.
• Partner with software and systems teams to optimize product performance and feature sets.
• Debug functional, timing, and power issues during silicon bring-up.

Requirements

• Master’s degree in Computer Science, Electrical Engineering, or an equivalent field.
• 8–15 years of experience delivering complex, high-performance RTL designs.
• Experience with front-end chip integration, third-party IP integration, and high-speed I/O design.
• Multiple successful silicon deliveries and experience collaborating with and managing external vendors.
• Networking experience with TCP/IP, RDMA, and Ethernet, plus knowledge of PCIe, CPU interfaces, and SerDes technology.
• Working knowledge of Python and TCL scripting tools.

Nice to have

• Experience with FPGA development toolchains, including place and route, floorplanning, and timing analysis.

Culture & Benefits

• Build a wafer-scale AI platform designed to go beyond GPU limitations.
• Work on one of the fastest AI supercomputers in the world.
• Opportunities to publish and open-source AI research.
• Startup vitality combined with job stability.
• Non-corporate culture focused on individual respect, continuous learning, growth, and inclusion.